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Searched refs:p_reg (Results 1 – 25 of 63) sorted by relevance

123

/bsp/allwinner/libraries/sunxi-hal/hal/source/g2d_rcq/
A Dg2d_bld.c44 p_reg = p_bld->get_reg(p_bld); in bld_in_set()
45 if (!p_reg) in bld_in_set()
85 if (!p_reg || !para) in bld_ck_para_set()
117 if (!p_reg) in bld_bk_set()
133 if (!p_reg) in bld_out_setting()
156 if (!p_reg) in bld_set_rop_ctrl()
178 if (!p_reg) in bld_cs_set()
207 if (!p_reg) in bld_csc_reg_set()
259 if (!p_reg) in bld_porter_duff()
350 if (!p_reg) in bld_rop2_set()
[all …]
A Dg2d_scal.c284 if (!p_reg) in g2d_vsu_para_set()
288 p_reg->vs_ctrl.bits.en = 1; in g2d_vsu_para_set()
331 p_reg->c_hor_step.dwval = 0; in g2d_vsu_para_set()
332 p_reg->c_ver_step.dwval = 0; in g2d_vsu_para_set()
336 p_reg->y_hor_phase.dwval = 0; in g2d_vsu_para_set()
340 p_reg->c_hor_phase.dwval = 0; in g2d_vsu_para_set()
341 p_reg->c_ver_phase.dwval = 0; in g2d_vsu_para_set()
464 p_reg->y_hor_phase.dwval = 0; in g2d_vsu_para_set()
465 p_reg->y_ver_phase.dwval = 0; in g2d_vsu_para_set()
469 p_reg->y_hor_phase.dwval = 0; in g2d_vsu_para_set()
[all …]
A Dg2d_ovl_v.c28 if (!p_reg) in g2d_ovl_v_calc_coarse()
134 if (!p_reg) in g2d_ovl_v_fc_set()
160 if (!p_reg) in g2d_vlayer_set()
175 p_reg->ovl_attr.bits.lay_en = 1; in g2d_vlayer_set()
177 p_reg->ovl_mem.bits.lay_width = in g2d_vlayer_set()
182 p_reg->ovl_winsize.bits.width = in g2d_vlayer_set()
188 p_reg->ovl_mem_coor.dwval = 0; in g2d_vlayer_set()
221 p_reg->ovl_mem_pitch0 = pitch0; in g2d_vlayer_set()
223 p_reg->ovl_mem_pitch1 = pitch1; in g2d_vlayer_set()
225 p_reg->ovl_mem_pitch2 = pitch2; in g2d_vlayer_set()
[all …]
A Dg2d_ovl_u.c28 if (!p_reg) in g2d_ovl_u_fc_set()
32 p_reg->ovl_fill_color = color_value; in g2d_ovl_u_fc_set()
50 if (!p_reg) in g2d_uilayer_set()
58 p_reg->ovl_attr.bits.lay_en = 1; in g2d_uilayer_set()
60 p_reg->ovl_mem.bits.lay_width = in g2d_uilayer_set()
62 p_reg->ovl_mem.bits.lay_height = in g2d_uilayer_set()
64 p_reg->ovl_winsize.bits.width = in g2d_uilayer_set()
66 p_reg->ovl_winsize.bits.height = in g2d_uilayer_set()
69 p_reg->ovl_mem_coor.dwval = 0; in g2d_uilayer_set()
72 p_reg->ovl_mem_pitch0 = pitch0; in g2d_uilayer_set()
[all …]
A Dg2d_wb.c111 p_reg = p_wb->get_reg(p_wb); in g2d_wb_set()
112 if (!p_reg) in g2d_wb_set()
115 p_reg->data_size.bits.height = in g2d_wb_set()
117 p_reg->data_size.bits.width = in g2d_wb_set()
147 p_reg->pitch0 = pitch0; in g2d_wb_set()
149 p_reg->pitch1 = pitch1; in g2d_wb_set()
151 p_reg->pitch2 = pitch2; in g2d_wb_set()
156 p_reg->laddr0 = addr0 & 0xffffffff; in g2d_wb_set()
157 p_reg->haddr0 = (addr0 >> 32) & 0xff; in g2d_wb_set()
160 p_reg->laddr1 = addr1 & 0xffffffff; in g2d_wb_set()
[all …]
/bsp/renesas/libraries/HAL_Drivers/
A Ddrv_sdhi.c46 p_ctrl->p_reg->SD_INFO1 = 0U;
47 p_ctrl->p_reg->SD_INFO2 = 0U;
55 p_ctrl->p_reg->SD_INFO1_MASK = mask;
119 cmd->resp[0] = (p_ctrl->p_reg->SD_RSP76 << 8) | (p_ctrl->p_reg->SD_RSP54 >> 24);
120 cmd->resp[1] = (p_ctrl->p_reg->SD_RSP54 << 8) | (p_ctrl->p_reg->SD_RSP32 >> 24);
121 cmd->resp[2] = (p_ctrl->p_reg->SD_RSP32 << 8) | (p_ctrl->p_reg->SD_RSP10 >> 24);
155 cmd->resp[0] = (p_ctrl->p_reg->SD_RSP76 << 8) | (p_ctrl->p_reg->SD_RSP54 >> 24);
156 cmd->resp[1] = (p_ctrl->p_reg->SD_RSP54 << 8) | (p_ctrl->p_reg->SD_RSP32 >> 24);
157 cmd->resp[2] = (p_ctrl->p_reg->SD_RSP32 << 8) | (p_ctrl->p_reg->SD_RSP10 >> 24);
190 p_ctrl->p_reg->SD_DMAEN = 0x2U; in transfer_write()
[all …]
/bsp/renesas/rzn2l_etherkit/rzn/fsp/src/bsp/mcu/all/
A Dbsp_reset.c95 uint32_t * p_reg; in R_BSP_ModuleResetEnable() local
99 p_reg = (uint32_t *) &R_SYSC_NS->MRCTLA + in R_BSP_ModuleResetEnable()
105 *p_reg |= mrctl; in R_BSP_ModuleResetEnable()
108 mrctl = *(volatile uint32_t *) (p_reg); in R_BSP_ModuleResetEnable()
119 uint32_t * p_reg; in R_BSP_ModuleResetDisable() local
123 p_reg = (uint32_t *) &R_SYSC_NS->MRCTLA + in R_BSP_ModuleResetDisable()
129 *p_reg &= ~mrctl; in R_BSP_ModuleResetDisable()
134 mrctl = *(volatile uint32_t *) (p_reg); in R_BSP_ModuleResetDisable()
135 mrctl = *(volatile uint32_t *) (p_reg); in R_BSP_ModuleResetDisable()
136 mrctl = *(volatile uint32_t *) (p_reg); in R_BSP_ModuleResetDisable()
/bsp/renesas/rzn2l_rsk/rzn/fsp/src/bsp/mcu/all/
A Dbsp_reset.c95 uint32_t * p_reg; in R_BSP_ModuleResetEnable() local
99 p_reg = (uint32_t *) &R_SYSC_NS->MRCTLA + in R_BSP_ModuleResetEnable()
105 *p_reg |= mrctl; in R_BSP_ModuleResetEnable()
108 mrctl = *(volatile uint32_t *) (p_reg); in R_BSP_ModuleResetEnable()
119 uint32_t * p_reg; in R_BSP_ModuleResetDisable() local
123 p_reg = (uint32_t *) &R_SYSC_NS->MRCTLA + in R_BSP_ModuleResetDisable()
129 *p_reg &= ~mrctl; in R_BSP_ModuleResetDisable()
134 mrctl = *(volatile uint32_t *) (p_reg); in R_BSP_ModuleResetDisable()
135 mrctl = *(volatile uint32_t *) (p_reg); in R_BSP_ModuleResetDisable()
136 mrctl = *(volatile uint32_t *) (p_reg); in R_BSP_ModuleResetDisable()
/bsp/renesas/rzt2m_rsk/rzt/fsp/src/bsp/mcu/all/
A Dbsp_reset.c126 uint32_t * p_reg; in R_BSP_ModuleResetEnable() local
130 p_reg = (uint32_t *) &R_SYSC_NS->MRCTLA + in R_BSP_ModuleResetEnable()
136 *p_reg |= mrctl; in R_BSP_ModuleResetEnable()
139 mrctl = *(volatile uint32_t *) (p_reg); in R_BSP_ModuleResetEnable()
150 uint32_t * p_reg; in R_BSP_ModuleResetDisable() local
154 p_reg = (uint32_t *) &R_SYSC_NS->MRCTLA + in R_BSP_ModuleResetDisable()
160 *p_reg &= ~mrctl; in R_BSP_ModuleResetDisable()
165 mrctl = *(volatile uint32_t *) (p_reg); in R_BSP_ModuleResetDisable()
166 mrctl = *(volatile uint32_t *) (p_reg); in R_BSP_ModuleResetDisable()
167 mrctl = *(volatile uint32_t *) (p_reg); in R_BSP_ModuleResetDisable()
/bsp/renesas/rzn2l_etherkit/rzn/fsp/src/r_sci_uart/
A Dr_sci_uart.c415 p_instance_ctrl->p_reg = in R_SCI_UART_Open()
471 p_instance_ctrl->p_reg->CCR0 = ccr0; in R_SCI_UART_Open()
681 p_instance_ctrl->p_reg->CFCLR_b.TDREC = 1; in R_SCI_UART_Write()
751 p_instance_ctrl->p_reg->CCR0 = preserved_ccr0 & in R_SCI_UART_BaudSet()
761 p_instance_ctrl->p_reg->CCR0 = preserved_ccr0; in R_SCI_UART_BaudSet()
955 p_instance_ctrl->p_reg->FCR_b.RFRST = 1U; in R_SCI_UART_ReadStop()
1355 p_instance_ctrl->p_reg->CCR3 = ccr3; in r_sci_uart_config_set()
1384 p_instance_ctrl->p_reg->CCR1 = ccr1; in r_sci_uart_config_set()
1409 p_instance_ctrl->p_reg->DCR = dcr; in r_sci_uart_config_set()
1636 p_instance_ctrl->p_reg->CCR0 = ccr0_temp; in sci_uart_txi_common()
[all …]
/bsp/renesas/rzn2l_rsk/rzn/fsp/src/r_sci_uart/
A Dr_sci_uart.c415 p_instance_ctrl->p_reg = in R_SCI_UART_Open()
471 p_instance_ctrl->p_reg->CCR0 = ccr0; in R_SCI_UART_Open()
681 p_instance_ctrl->p_reg->CFCLR_b.TDREC = 1; in R_SCI_UART_Write()
751 p_instance_ctrl->p_reg->CCR0 = preserved_ccr0 & in R_SCI_UART_BaudSet()
761 p_instance_ctrl->p_reg->CCR0 = preserved_ccr0; in R_SCI_UART_BaudSet()
955 p_instance_ctrl->p_reg->FCR_b.RFRST = 1U; in R_SCI_UART_ReadStop()
1355 p_instance_ctrl->p_reg->CCR3 = ccr3; in r_sci_uart_config_set()
1384 p_instance_ctrl->p_reg->CCR1 = ccr1; in r_sci_uart_config_set()
1409 p_instance_ctrl->p_reg->DCR = dcr; in r_sci_uart_config_set()
1636 p_instance_ctrl->p_reg->CCR0 = ccr0_temp; in sci_uart_txi_common()
[all …]
/bsp/renesas/rzt2m_rsk/rzt/fsp/src/r_sci_uart/
A Dr_sci_uart.c415 p_instance_ctrl->p_reg = in R_SCI_UART_Open()
471 p_instance_ctrl->p_reg->CCR0 = ccr0; in R_SCI_UART_Open()
681 p_instance_ctrl->p_reg->CFCLR_b.TDREC = 1; in R_SCI_UART_Write()
751 p_instance_ctrl->p_reg->CCR0 = preserved_ccr0 & in R_SCI_UART_BaudSet()
761 p_instance_ctrl->p_reg->CCR0 = preserved_ccr0; in R_SCI_UART_BaudSet()
955 p_instance_ctrl->p_reg->FCR_b.RFRST = 1U; in R_SCI_UART_ReadStop()
1355 p_instance_ctrl->p_reg->CCR3 = ccr3; in r_sci_uart_config_set()
1384 p_instance_ctrl->p_reg->CCR1 = ccr1; in r_sci_uart_config_set()
1409 p_instance_ctrl->p_reg->DCR = dcr; in r_sci_uart_config_set()
1636 p_instance_ctrl->p_reg->CCR0 = ccr0_temp; in sci_uart_txi_common()
[all …]
/bsp/renesas/ra8m1-ek/ra/fsp/src/r_sci_b_uart/
A Dr_sci_b_uart.c366 p_ctrl->p_reg->CCR0 = ccr0; in R_SCI_B_UART_Open()
413 p_ctrl->p_reg->CCR0 = ccr0; in R_SCI_B_UART_Open()
449 p_ctrl->p_reg->FCR_b.TFRST = 1U; in R_SCI_B_UART_Close()
453 p_ctrl->p_reg->CCR3 = 0U; in R_SCI_B_UART_Close()
1263 p_ctrl->p_reg->CCR3 = ccr3; in r_sci_b_uart_config_set()
1282 p_ctrl->p_reg->CCR2 = ccr2; in r_sci_b_uart_config_set()
1299 p_ctrl->p_reg->CCR1 = ccr1; in r_sci_b_uart_config_set()
1301 p_ctrl->p_reg->CCR4 = 0U; in r_sci_b_uart_config_set()
1322 p_ctrl->p_reg->DCR = dcr; in r_sci_b_uart_config_set()
1366 p_ctrl->p_reg->FCR |= fcr; in r_sci_b_uart_fifo_cfg()
[all …]
/bsp/renesas/ra8d1-vision-board/ra/fsp/src/r_sci_b_uart/
A Dr_sci_b_uart.c366 p_ctrl->p_reg->CCR0 = ccr0; in R_SCI_B_UART_Open()
413 p_ctrl->p_reg->CCR0 = ccr0; in R_SCI_B_UART_Open()
449 p_ctrl->p_reg->FCR_b.TFRST = 1U; in R_SCI_B_UART_Close()
453 p_ctrl->p_reg->CCR3 = 0U; in R_SCI_B_UART_Close()
1263 p_ctrl->p_reg->CCR3 = ccr3; in r_sci_b_uart_config_set()
1282 p_ctrl->p_reg->CCR2 = ccr2; in r_sci_b_uart_config_set()
1299 p_ctrl->p_reg->CCR1 = ccr1; in r_sci_b_uart_config_set()
1301 p_ctrl->p_reg->CCR4 = 0U; in r_sci_b_uart_config_set()
1322 p_ctrl->p_reg->DCR = dcr; in r_sci_b_uart_config_set()
1366 p_ctrl->p_reg->FCR |= fcr; in r_sci_b_uart_fifo_cfg()
[all …]
/bsp/renesas/ra8d1-ek/ra/fsp/src/r_sci_b_uart/
A Dr_sci_b_uart.c366 p_ctrl->p_reg->CCR0 = ccr0; in R_SCI_B_UART_Open()
413 p_ctrl->p_reg->CCR0 = ccr0; in R_SCI_B_UART_Open()
449 p_ctrl->p_reg->FCR_b.TFRST = 1U; in R_SCI_B_UART_Close()
453 p_ctrl->p_reg->CCR3 = 0U; in R_SCI_B_UART_Close()
1263 p_ctrl->p_reg->CCR3 = ccr3; in r_sci_b_uart_config_set()
1282 p_ctrl->p_reg->CCR2 = ccr2; in r_sci_b_uart_config_set()
1299 p_ctrl->p_reg->CCR1 = ccr1; in r_sci_b_uart_config_set()
1301 p_ctrl->p_reg->CCR4 = 0U; in r_sci_b_uart_config_set()
1322 p_ctrl->p_reg->DCR = dcr; in r_sci_b_uart_config_set()
1366 p_ctrl->p_reg->FCR |= fcr; in r_sci_b_uart_fifo_cfg()
[all …]
/bsp/renesas/ra6m4-cpk/ra/fsp/src/r_sci_uart/
A Dr_sci_uart.c386 p_ctrl->p_reg->SCR = 0U; in R_SCI_UART_Open()
387 p_ctrl->p_reg->SSR = 0U; in R_SCI_UART_Open()
388 p_ctrl->p_reg->SIMR1 = 0U; in R_SCI_UART_Open()
389 p_ctrl->p_reg->SIMR2 = 0U; in R_SCI_UART_Open()
390 p_ctrl->p_reg->SIMR3 = 0U; in R_SCI_UART_Open()
391 p_ctrl->p_reg->CDR = 0U; in R_SCI_UART_Open()
429 p_ctrl->p_reg->SCR = (uint8_t) scr; in R_SCI_UART_Open()
467 p_ctrl->p_reg->SCR = 0U; in R_SCI_UART_Close()
742 p_ctrl->p_reg->SCR = preserved_scr; in R_SCI_UART_BaudSet()
1620 p_ctrl->p_reg->SCR = scr_temp; in sci_uart_txi_isr()
[all …]
/bsp/renesas/ra6m3-ek/ra/fsp/src/r_sci_uart/
A Dr_sci_uart.c386 p_ctrl->p_reg->SCR = 0U; in R_SCI_UART_Open()
387 p_ctrl->p_reg->SSR = 0U; in R_SCI_UART_Open()
388 p_ctrl->p_reg->SIMR1 = 0U; in R_SCI_UART_Open()
389 p_ctrl->p_reg->SIMR2 = 0U; in R_SCI_UART_Open()
390 p_ctrl->p_reg->SIMR3 = 0U; in R_SCI_UART_Open()
391 p_ctrl->p_reg->CDR = 0U; in R_SCI_UART_Open()
429 p_ctrl->p_reg->SCR = (uint8_t) scr; in R_SCI_UART_Open()
467 p_ctrl->p_reg->SCR = 0U; in R_SCI_UART_Close()
742 p_ctrl->p_reg->SCR = preserved_scr; in R_SCI_UART_BaudSet()
1620 p_ctrl->p_reg->SCR = scr_temp; in sci_uart_txi_isr()
[all …]
/bsp/renesas/ra2l1-cpk/ra/fsp/src/r_sci_uart/
A Dr_sci_uart.c386 p_ctrl->p_reg->SCR = 0U; in R_SCI_UART_Open()
387 p_ctrl->p_reg->SSR = 0U; in R_SCI_UART_Open()
388 p_ctrl->p_reg->SIMR1 = 0U; in R_SCI_UART_Open()
389 p_ctrl->p_reg->SIMR2 = 0U; in R_SCI_UART_Open()
390 p_ctrl->p_reg->SIMR3 = 0U; in R_SCI_UART_Open()
391 p_ctrl->p_reg->CDR = 0U; in R_SCI_UART_Open()
429 p_ctrl->p_reg->SCR = (uint8_t) scr; in R_SCI_UART_Open()
467 p_ctrl->p_reg->SCR = 0U; in R_SCI_UART_Close()
742 p_ctrl->p_reg->SCR = preserved_scr; in R_SCI_UART_BaudSet()
1620 p_ctrl->p_reg->SCR = scr_temp; in sci_uart_txi_isr()
[all …]
/bsp/renesas/ra6m4-iot/ra/fsp/src/r_sci_uart/
A Dr_sci_uart.c386 p_ctrl->p_reg->SCR = 0U; in R_SCI_UART_Open()
387 p_ctrl->p_reg->SSR = 0U; in R_SCI_UART_Open()
388 p_ctrl->p_reg->SIMR1 = 0U; in R_SCI_UART_Open()
389 p_ctrl->p_reg->SIMR2 = 0U; in R_SCI_UART_Open()
390 p_ctrl->p_reg->SIMR3 = 0U; in R_SCI_UART_Open()
391 p_ctrl->p_reg->CDR = 0U; in R_SCI_UART_Open()
429 p_ctrl->p_reg->SCR = (uint8_t) scr; in R_SCI_UART_Open()
467 p_ctrl->p_reg->SCR = 0U; in R_SCI_UART_Close()
742 p_ctrl->p_reg->SCR = preserved_scr; in R_SCI_UART_BaudSet()
1620 p_ctrl->p_reg->SCR = scr_temp; in sci_uart_txi_isr()
[all …]
/bsp/renesas/ra6m3-hmi-board/ra/fsp/src/r_sci_uart/
A Dr_sci_uart.c402 p_ctrl->p_reg->SCR = 0U; in R_SCI_UART_Open()
403 p_ctrl->p_reg->SSR = 0U; in R_SCI_UART_Open()
404 p_ctrl->p_reg->SIMR1 = 0U; in R_SCI_UART_Open()
405 p_ctrl->p_reg->SIMR2 = 0U; in R_SCI_UART_Open()
406 p_ctrl->p_reg->SIMR3 = 0U; in R_SCI_UART_Open()
407 p_ctrl->p_reg->CDR = 0U; in R_SCI_UART_Open()
445 p_ctrl->p_reg->SCR = (uint8_t) scr; in R_SCI_UART_Open()
483 p_ctrl->p_reg->SCR = 0U; in R_SCI_UART_Close()
777 p_ctrl->p_reg->SCR = preserved_scr; in R_SCI_UART_BaudSet()
1678 p_ctrl->p_reg->SCR = scr_temp; in sci_uart_txi_isr()
[all …]
/bsp/renesas/ra4e2-eco/ra/fsp/src/r_sci_uart/
A Dr_sci_uart.c415 p_ctrl->p_reg->SCR = 0U; in R_SCI_UART_Open()
416 p_ctrl->p_reg->SSR = 0U; in R_SCI_UART_Open()
417 p_ctrl->p_reg->SIMR1 = 0U; in R_SCI_UART_Open()
418 p_ctrl->p_reg->SIMR2 = 0U; in R_SCI_UART_Open()
419 p_ctrl->p_reg->SIMR3 = 0U; in R_SCI_UART_Open()
420 p_ctrl->p_reg->CDR = 0U; in R_SCI_UART_Open()
458 p_ctrl->p_reg->SCR = (uint8_t) scr; in R_SCI_UART_Open()
496 p_ctrl->p_reg->SCR = 0U; in R_SCI_UART_Close()
804 p_ctrl->p_reg->SCR = preserved_scr; in R_SCI_UART_BaudSet()
1746 p_ctrl->p_reg->SCR = scr_temp; in sci_uart_txi_isr()
[all …]
/bsp/renesas/ebf_qi_min_6m5/ra/fsp/src/r_sci_uart/
A Dr_sci_uart.c402 p_ctrl->p_reg->SCR = 0U; in R_SCI_UART_Open()
403 p_ctrl->p_reg->SSR = 0U; in R_SCI_UART_Open()
404 p_ctrl->p_reg->SIMR1 = 0U; in R_SCI_UART_Open()
405 p_ctrl->p_reg->SIMR2 = 0U; in R_SCI_UART_Open()
406 p_ctrl->p_reg->SIMR3 = 0U; in R_SCI_UART_Open()
407 p_ctrl->p_reg->CDR = 0U; in R_SCI_UART_Open()
445 p_ctrl->p_reg->SCR = (uint8_t) scr; in R_SCI_UART_Open()
483 p_ctrl->p_reg->SCR = 0U; in R_SCI_UART_Close()
777 p_ctrl->p_reg->SCR = preserved_scr; in R_SCI_UART_BaudSet()
1679 p_ctrl->p_reg->SCR = scr_temp; in sci_uart_txi_isr()
[all …]
/bsp/renesas/ra4m2-eco/ra/fsp/src/r_sci_uart/
A Dr_sci_uart.c402 p_ctrl->p_reg->SCR = 0U; in R_SCI_UART_Open()
403 p_ctrl->p_reg->SSR = 0U; in R_SCI_UART_Open()
404 p_ctrl->p_reg->SIMR1 = 0U; in R_SCI_UART_Open()
405 p_ctrl->p_reg->SIMR2 = 0U; in R_SCI_UART_Open()
406 p_ctrl->p_reg->SIMR3 = 0U; in R_SCI_UART_Open()
407 p_ctrl->p_reg->CDR = 0U; in R_SCI_UART_Open()
445 p_ctrl->p_reg->SCR = (uint8_t) scr; in R_SCI_UART_Open()
483 p_ctrl->p_reg->SCR = 0U; in R_SCI_UART_Close()
777 p_ctrl->p_reg->SCR = preserved_scr; in R_SCI_UART_BaudSet()
1679 p_ctrl->p_reg->SCR = scr_temp; in sci_uart_txi_isr()
[all …]
/bsp/renesas/ra6e2-fpb/ra/fsp/src/r_sci_uart/
A Dr_sci_uart.c420 p_ctrl->p_reg->SCR = 0U; in R_SCI_UART_Open()
421 p_ctrl->p_reg->SSR = 0U; in R_SCI_UART_Open()
422 p_ctrl->p_reg->SIMR1 = 0U; in R_SCI_UART_Open()
423 p_ctrl->p_reg->SIMR2 = 0U; in R_SCI_UART_Open()
424 p_ctrl->p_reg->SIMR3 = 0U; in R_SCI_UART_Open()
425 p_ctrl->p_reg->CDR = 0U; in R_SCI_UART_Open()
463 p_ctrl->p_reg->SCR = (uint8_t) scr; in R_SCI_UART_Open()
501 p_ctrl->p_reg->SCR = 0U; in R_SCI_UART_Close()
809 p_ctrl->p_reg->SCR = preserved_scr; in R_SCI_UART_BaudSet()
1751 p_ctrl->p_reg->SCR = scr_temp; in sci_uart_txi_isr()
[all …]
/bsp/renesas/ra6m3-hmi-board/ra/fsp/src/bsp/mcu/all/
A Dbsp_common.h216 BSP_CMSE_NONSECURE_ENTRY uint8_t R_BSP_NSC_STYPE3_RegU8Read(uint8_t volatile const * p_reg);
217 BSP_CMSE_NONSECURE_ENTRY uint16_t R_BSP_NSC_STYPE3_RegU16Read(uint16_t volatile const * p_reg);
240 __STATIC_INLINE uint8_t R_BSP_S_STYPE3_RegU8Read (uint8_t volatile const * p_reg) in R_BSP_S_STYPE3_RegU8Read() argument
242 p_reg = (uint8_t volatile const *) ((uint32_t) p_reg | BSP_FEATURE_TZ_NS_OFFSET); in R_BSP_S_STYPE3_RegU8Read()
244 return *p_reg; in R_BSP_S_STYPE3_RegU8Read()
254 __STATIC_INLINE uint16_t R_BSP_S_STYPE3_RegU16Read (uint16_t volatile const * p_reg) in R_BSP_S_STYPE3_RegU16Read() argument
256 p_reg = (uint16_t volatile const *) ((uint32_t) p_reg | BSP_FEATURE_TZ_NS_OFFSET); in R_BSP_S_STYPE3_RegU16Read()
258 return *p_reg; in R_BSP_S_STYPE3_RegU16Read()
268 __STATIC_INLINE uint32_t R_BSP_S_STYPE3_RegU32Read (uint32_t volatile const * p_reg) in R_BSP_S_STYPE3_RegU32Read() argument
270 p_reg = (uint32_t volatile const *) ((uint32_t) p_reg | BSP_FEATURE_TZ_NS_OFFSET); in R_BSP_S_STYPE3_RegU32Read()
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