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Searched refs:periph (Results 1 – 25 of 48) sorted by relevance

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/bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi/
A Dclk_periph.c43 if (!periph->mux.reg) in sunxi_clk_periph_get_parent()
53 *parent_index = GET_BITS(periph->mux.shift, periph->mux.width, reg); in sunxi_clk_periph_get_parent()
71 if (!periph->mux.reg) in sunxi_clk_periph_set_parent()
80 reg = SET_BITS(periph->mux.shift, periph->mux.width, reg, index); in sunxi_clk_periph_set_parent()
127 periph->com_gate->val |= 1 << periph->com_gate_off; in __sunxi_clk_periph_enable_shared()
183 periph = clk->config; in sunxi_clk_periph_enable()
189 if (periph->com_gate) in sunxi_clk_periph_enable()
212 periph = clk->config; in sunxi_clk_periph_is_enabled()
213 gate = &periph->gate; in sunxi_clk_periph_is_enabled()
261 periph->com_gate->val &= ~(1 << periph->com_gate_off); in __sunxi_clk_periph_disable_shared()
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/bsp/wch/arm/Libraries/ch32_drivers/
A Ddrv_hwtimer_ch32f20x.c23 TIM_TypeDef *periph; member
31 .periph = TIM1,
39 .periph = TIM2,
47 .periph = TIM3,
55 .periph = TIM4,
63 .periph = TIM5,
71 .periph = TIM6,
79 .periph = TIM7,
87 .periph = TIM8,
95 .periph = TIM9,
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A Ddrv_hwtimer_ch32f10x.c23 TIM_TypeDef *periph; member
31 .periph = TIM1,
39 .periph = TIM2,
47 .periph = TIM3,
55 .periph = TIM4,
76 ch32f1_tim_clock_init(hwtimer_dev->periph); in ch32f1_hwtimer_init()
137 TIM_SetCounter(hwtimer_dev->periph, 0); in ch32f1_hwtimer_start()
149 TIM_Cmd(hwtimer_dev->periph, ENABLE); in ch32f1_hwtimer_start()
164 TIM_Cmd(hwtimer_dev->periph, DISABLE); in ch32f1_hwtimer_stop()
166 TIM_SetCounter(hwtimer_dev->periph, 0); in ch32f1_hwtimer_stop()
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A Ddrv_pwm_ch32f10x.c31 TIM_TypeDef *periph; member
43 .periph = TIM1,
73 .periph = TIM2,
103 .periph = TIM3,
133 .periph = TIM4,
192 TIM_Cmd(pwm_device->periph, ENABLE); in ch32f1_pwm_device_enable()
208 arr_counter = pwm_device->periph->ATRLR + 1; in ch32f1_pwm_device_get()
209 prescaler = pwm_device->periph->PSC + 1; in ch32f1_pwm_device_get()
218 ccr_counter = pwm_device->periph->CH1CVR + 1; in ch32f1_pwm_device_get()
223 ccr_counter = pwm_device->periph->CH2CVR + 1; in ch32f1_pwm_device_get()
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A Ddrv_pwm_ch32f20x.c31 TIM_TypeDef *periph; member
43 .periph = TIM1,
73 .periph = TIM2,
103 .periph = TIM3,
133 .periph = TIM4,
163 .periph = TIM5,
193 .periph = TIM8,
223 .periph = TIM9,
253 .periph = TIM10,
313 TIM_Cmd(pwm_device->periph, ENABLE); in ch32f2_pwm_device_enable()
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A Ddrv_uart_ch32f10x.c28 USART_TypeDef *periph; member
36 .periph = USART1,
45 .periph = USART2,
53 .periph = USART3,
69 ch32f1_usart_clock_and_io_init(usart_dev->periph); in ch32f1_usart_configure()
119 USART_Init(usart_dev->periph, &USART_InitStructure); in ch32f1_usart_configure()
120 USART_Cmd(usart_dev->periph, ENABLE); in ch32f1_usart_configure()
169 USART_SendData(usart_dev->periph, (uint8_t)ch); in ch32f1_usart_putc()
190 ch = USART_ReceiveData(usart_dev->periph) & 0xff; in ch32f1_usart_getc()
208 …if ((USART_GetITStatus(usart_dev->periph, USART_IT_RXNE) != RESET) && (RESET != USART_GetFlagStatu… in usart_isr()
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A Ddrv_uart_ch32f20x.c28 USART_TypeDef *periph; member
36 .periph = USART1,
45 .periph = USART2,
53 .periph = USART3,
61 .periph = UART4,
69 .periph = UART5,
77 .periph = UART6,
85 .periph = UART7,
93 .periph = UART8,
160 USART_Cmd(usart_dev->periph, ENABLE); in ch32f2_usart_configure()
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A Ddrv_spi_ch32f20x.c32 SPI_TypeDef *periph; member
39 {.periph = SPI1,
44 {.periph = SPI2,
49 {.periph = SPI3,
105 ch32f2_spi_clock_and_io_init(spi_bus_dev->periph); in ch32f2_spi_configure()
107 spi_clock = ch32f2_spi_clock_get(spi_bus_dev->periph); in ch32f2_spi_configure()
190 SPI_Init(spi_bus_dev->periph, &SPI_InitStruct); in ch32f2_spi_configure()
192 SPI_Cmd(spi_bus_dev->periph, ENABLE); in ch32f2_spi_configure()
240 SPI_I2S_SendData(spi_bus_dev->periph, data); in ch32f2_spi_xfer()
246 data = SPI_I2S_ReceiveData(spi_bus_dev->periph); in ch32f2_spi_xfer()
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A Ddrv_spi_ch32f10x.c32 SPI_TypeDef *periph; member
39 {.periph = SPI1,
44 {.periph = SPI2,
100 ch32f1_spi_clock_and_io_init(spi_bus_dev->periph); in ch32f1_spi_configure()
102 spi_clock = ch32f1_spi_clock_get(spi_bus_dev->periph); in ch32f1_spi_configure()
185 SPI_Init(spi_bus_dev->periph, &SPI_InitStruct); in ch32f1_spi_configure()
187 SPI_Cmd(spi_bus_dev->periph, ENABLE); in ch32f1_spi_configure()
235 SPI_I2S_SendData(spi_bus_dev->periph, data); in ch32f1_spi_xfer()
241 data = SPI_I2S_ReceiveData(spi_bus_dev->periph); in ch32f1_spi_xfer()
270 SPI_I2S_SendData(spi_bus_dev->periph, data); in ch32f1_spi_xfer()
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A Ddrv_hwi2c_ch32f10x.c27 I2C_TypeDef *periph; member
308 … if (ch32f1_i2c_read(i2c_bus_dev->periph, msg->flags, msg->addr, msg->buf, msg->len) != 0) in ch32f1_master_xfer()
317 … if (ch32f1_i2c_write(i2c_bus_dev->periph, msg->flags, msg->addr, msg->buf, msg->len) != 0) in ch32f1_master_xfer()
340 i2c_bus1.periph = I2C1; in rt_hw_i2c_init()
341 ch32f1_i2c_clock_and_io_init(i2c_bus1.periph); in rt_hw_i2c_init()
342 ch32f1_i2c_config(i2c_bus1.periph); in rt_hw_i2c_init()
354 i2c_bus2.periph = I2C2; in rt_hw_i2c_init()
355 ch32f1_i2c_clock_and_io_init(i2c_bus2.periph); in rt_hw_i2c_init()
356 ch32f1_i2c_config(i2c_bus2.periph); in rt_hw_i2c_init()
A Ddrv_hwi2c_ch32f20x.c27 I2C_TypeDef *periph; member
308 … if (ch32f2_i2c_read(i2c_bus_dev->periph, msg->flags, msg->addr, msg->buf, msg->len) != 0) in ch32f2_master_xfer()
317 … if (ch32f2_i2c_write(i2c_bus_dev->periph, msg->flags, msg->addr, msg->buf, msg->len) != 0) in ch32f2_master_xfer()
340 i2c_bus1.periph = I2C1; in rt_hw_i2c_init()
341 ch32f2_i2c_clock_and_io_init(i2c_bus1.periph); in rt_hw_i2c_init()
342 ch32f2_i2c_config(i2c_bus1.periph); in rt_hw_i2c_init()
354 i2c_bus2.periph = I2C2; in rt_hw_i2c_init()
355 ch32f2_i2c_clock_and_io_init(i2c_bus2.periph); in rt_hw_i2c_init()
356 ch32f2_i2c_config(i2c_bus2.periph); in rt_hw_i2c_init()
/bsp/nxp/imx/imx6ull-smart/drivers/
A Ddrv_uart.c175 UART_Type *periph = RT_NULL; in _uart_ops_configure() local
182 periph = (UART_Type*)uart->periph.vaddr; in _uart_ops_configure()
246 UART_Type *periph = RT_NULL; in _uart_ops_control() local
252 periph = (UART_Type*)uart->periph.vaddr; in _uart_ops_control()
279 UART_Type *periph = RT_NULL; in _uart_ops_putc() local
284 periph = (UART_Type*)uart->periph.vaddr; in _uart_ops_putc()
287 periph->UTXD = ch; in _uart_ops_putc()
295 UART_Type *periph = RT_NULL; in _uart_ops_getc() local
301 periph = (UART_Type*)uart->periph.vaddr; in _uart_ops_getc()
303 ch = (0 == (periph->USR2 & UART_USR2_RDR_MASK)) ? -1 : periph->URXD; in _uart_ops_getc()
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/bsp/apm32/libraries/APM32F4xx_Library/APM32F4xx_StdPeriphDriver/src/
A Dapm32f4xx_dbgmcu.c77 void DBGMCU_Enable(uint32_t periph) in DBGMCU_Enable() argument
79 DBGMCU->CFG |= periph; in DBGMCU_Enable()
94 void DBGMCU_Disable(uint32_t periph) in DBGMCU_Disable() argument
96 DBGMCU->CFG &= ~periph; in DBGMCU_Disable()
124 void DBGMCU_EnableAPB1Periph(uint32_t periph) in DBGMCU_EnableAPB1Periph() argument
126 DBGMCU->APB1F |= periph; in DBGMCU_EnableAPB1Periph()
154 void DBGMCU_DisableAPB1Periph(uint32_t periph) in DBGMCU_DisableAPB1Periph() argument
156 DBGMCU->APB1F &= ~periph; in DBGMCU_DisableAPB1Periph()
172 void DBGMCU_EnableAPB2Periph(uint32_t periph) in DBGMCU_EnableAPB2Periph() argument
174 DBGMCU->APB2F |= periph; in DBGMCU_EnableAPB2Periph()
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/bsp/airm2m/air32f103/libraries/rt_drivers/
A Ddrv_hwtimer.c37 air32_tim_clock_init(hwtimer_dev->periph); in air32_hwtimer_init()
41 clk = air32_tim_clock_get(hwtimer_dev->periph); in air32_hwtimer_init()
78 TIM_ITConfig(hwtimer_dev->periph, TIM_IT_Update, ENABLE); in air32_hwtimer_init()
79 TIM_ClearITPendingBit(hwtimer_dev->periph, TIM_IT_Update); in air32_hwtimer_init()
98 TIM_SetCounter(hwtimer_dev->periph, 0); in air32_hwtimer_start()
99 TIM_SetAutoreload(hwtimer_dev->periph, cnt - 1); in air32_hwtimer_start()
110 TIM_Cmd(hwtimer_dev->periph, ENABLE); in air32_hwtimer_start()
125 TIM_Cmd(hwtimer_dev->periph, DISABLE); in air32_hwtimer_stop()
127 TIM_SetCounter(hwtimer_dev->periph, 0); in air32_hwtimer_stop()
138 return hwtimer_dev->periph->CNT; in air32_hwtimer_counter_get()
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A Ddrv_spi.c30 SPI_TypeDef *periph; member
37 {.periph = SPI1,
42 {.periph = SPI2,
98 air32_spi_clock_and_io_init(spi_bus_dev->periph); in air32_spi_configure()
100 spi_clock = air32_spi_clock_get(spi_bus_dev->periph); in air32_spi_configure()
183 SPI_Init(spi_bus_dev->periph, &SPI_InitStruct); in air32_spi_configure()
185 SPI_Cmd(spi_bus_dev->periph, ENABLE); in air32_spi_configure()
232 SPI_I2S_SendData(spi_bus_dev->periph, data); in air32_spi_xfer()
237 data = SPI_I2S_ReceiveData(spi_bus_dev->periph); in air32_spi_xfer()
266 SPI_I2S_SendData(spi_bus_dev->periph, data); in air32_spi_xfer()
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A Ddrv_hwtimer.h22 TIM_TypeDef *periph; member
30 .periph = TIM1,
38 .periph = TIM2,
46 .periph = TIM3,
54 .periph = TIM4,
/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/
A Dab32vg1_hal_rcu.c11 void hal_rcu_periph_clk_enable(uint32_t periph) in hal_rcu_periph_clk_enable() argument
13 if (periph <= RCU_TMR2) { in hal_rcu_periph_clk_enable()
14 CLKGAT0 |= BIT(periph); in hal_rcu_periph_clk_enable()
15 } else if (periph <= RCU_SPI1) { in hal_rcu_periph_clk_enable()
16 CLKGAT1 |= BIT(periph - RCU_FMAMFDT); in hal_rcu_periph_clk_enable()
20 void hal_rcu_periph_clk_disable(uint32_t periph) in hal_rcu_periph_clk_disable() argument
22 if (periph <= RCU_TMR2) { in hal_rcu_periph_clk_disable()
23 CLKGAT0 &= ~BIT(periph); in hal_rcu_periph_clk_disable()
24 } else if (periph <= RCU_SPI1) { in hal_rcu_periph_clk_disable()
25 CLKGAT1 &= ~BIT(periph - RCU_FMAMFDT); in hal_rcu_periph_clk_disable()
/bsp/gd32/arm/libraries/gd32_drivers/
A Ddrv_usart_v2.c304 char chr = usart_data_receive(uart->periph); in usart_isr()
316 usart_data_transmit(uart->periph, put_char); in usart_isr()
832 usart_baudrate_set(uart->periph, cfg->baud_rate); in gd32_uart_configure()
848 usart_stop_bit_set(uart->periph, USART_STB_2BIT); in gd32_uart_configure()
851 usart_stop_bit_set(uart->periph, USART_STB_1BIT); in gd32_uart_configure()
858 usart_parity_config(uart->periph, USART_PM_ODD); in gd32_uart_configure()
861 usart_parity_config(uart->periph, USART_PM_EVEN); in gd32_uart_configure()
870 usart_enable(uart->periph); in gd32_uart_configure()
1174 usart_deinit(uart->periph); in gd32_uart_control()
1193 usart_data_transmit(uart->periph, ch); in gd32_uart_putc()
[all …]
/bsp/nuclei/libraries/gd32vf103/HAL_Drivers/
A Ddrv_pwm.c88 static uint32_t gd32_get_pwm_clk(rt_uint32_t periph) in gd32_get_pwm_clk() argument
92 if (periph != TIMER0) in gd32_get_pwm_clk()
117 pwmclk = gd32_get_pwm_clk(config->periph); in gd32_pwm_get()
121 period = (uint16_t)TIMER_CAR(config->periph) + 1; in gd32_pwm_get()
154 pwmclk = gd32_get_pwm_clk(config->periph); in gd32_pwm_set()
213 timer_init(config->periph, &timer_initpara); in gd32_pwm_set()
234 timer_auto_reload_shadow_enable(config->periph); in gd32_pwm_set()
235 timer_enable(config->periph); in gd32_pwm_set()
266 pwmclk = gd32_get_pwm_clk(config->periph); in gd32_pwm_init()
284 timer_init(config->periph, &timer_initpara); in gd32_pwm_init()
[all …]
/bsp/wch/risc-v/Libraries/ch32_drivers/
A Ddrv_pwm.c493 .periph = TIM1,
523 .periph = TIM2,
553 .periph = TIM3,
583 .periph = TIM4,
613 .periph = TIM5,
643 .periph = TIM8,
673 .periph = TIM9,
703 .periph = TIM10,
763 TIM_Cmd(pwm_device->periph, ENABLE); in ch32_pwm_device_enable()
778 arr_counter = pwm_device->periph->ATRLR + 1; in ch32_pwm_device_get()
[all …]
/bsp/apm32/libraries/APM32F4xx_Library/APM32F4xx_StdPeriphDriver/inc/
A Dapm32f4xx_dbgmcu.h91 void DBGMCU_Enable(uint32_t periph);
92 void DBGMCU_Disable(uint32_t periph);
93 void DBGMCU_DisableAPB1Periph(uint32_t periph);
94 void DBGMCU_EnableAPB1Periph(uint32_t periph);
95 void DBGMCU_DisableAPB2Periph(uint32_t periph);
96 void DBGMCU_EnableAPB2Periph(uint32_t periph);
/bsp/apm32/libraries/APM32E10x_Library/APM32E10x_StdPeriphDriver/src/
A Dapm32e10x_dbgmcu.c99 void DBGMCU_Enable(uint32_t periph) in DBGMCU_Enable() argument
101 DBGMCU->CFG |= periph; in DBGMCU_Enable()
139 void DBGMCU_Disable(uint32_t periph) in DBGMCU_Disable() argument
141 DBGMCU->CFG &= ~periph; in DBGMCU_Disable()
/bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/
A Dapm32f10x_dbgmcu.c100 void DBGMCU_Enable(uint32_t periph) in DBGMCU_Enable() argument
102 DBGMCU->CFG |= periph; in DBGMCU_Enable()
140 void DBGMCU_Disable(uint32_t periph) in DBGMCU_Disable() argument
142 DBGMCU->CFG &= ~periph; in DBGMCU_Disable()
/bsp/apm32/libraries/APM32S10x_Library/APM32S10x_StdPeriphDriver/src/
A Dapm32s10x_dbgmcu.c92 void DBGMCU_Enable(uint32_t periph) in DBGMCU_Enable() argument
94 DBGMCU->CFG |= periph; in DBGMCU_Enable()
124 void DBGMCU_Disable(uint32_t periph) in DBGMCU_Disable() argument
126 DBGMCU->CFG &= ~periph; in DBGMCU_Disable()
/bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/drivers/
A Dfsl_xrdc.h1121 xrdc_periph_t periph, in XRDC_SetPeriphAccessLockMode() argument
1124 uint32_t reg = base->PDAC_W[periph][1]; in XRDC_SetPeriphAccessLockMode()
1133 base->PDAC_W[periph][1] = reg; in XRDC_SetPeriphAccessLockMode()
1165 uint32_t reg = base->PDAC_W[periph][1] & ~XRDC_PDAC_W_EAL_MASK; in XRDC_SetPeriphAccessValid()
1169 base->PDAC_W[periph][1] = reg | XRDC_PDAC_W_VLD_MASK; in XRDC_SetPeriphAccessValid()
1173 base->PDAC_W[periph][1] = reg & ~XRDC_PDAC_W_VLD_MASK; in XRDC_SetPeriphAccessValid()
1178 base->PDAC_W[periph][1] |= XRDC_PDAC_W_VLD_MASK; in XRDC_SetPeriphAccessValid()
1182 base->PDAC_W[periph][1] &= ~XRDC_PDAC_W_VLD_MASK; in XRDC_SetPeriphAccessValid()
1196 xrdc_periph_t periph, in XRDC_SetPeriphExclAccessLockMode() argument
1202 uint32_t reg = base->PDAC_W[periph][1]; in XRDC_SetPeriphExclAccessLockMode()
[all …]

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