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Searched refs:pll_cpu_ctrl (Results 1 – 2 of 2) sorted by relevance

/bsp/allwinner_tina/drivers/
A Ddrv_clock.c20 reg = CCU->pll_cpu_ctrl; in cpu_get_pll_clk()
229 CCU->pll_cpu_ctrl &= ~(0x1 << 31); in cpu_set_pll_clk()
231 CCU->pll_cpu_ctrl = (0x1 << 31) | (m << 0) | (k << 4) | (n << 8) | (p << 16); in cpu_set_pll_clk()
232 if (wait_pll_stable((rt_uint32_t)(&CCU->pll_cpu_ctrl))) in cpu_set_pll_clk()
A Ddrv_clock.h141 volatile rt_uint32_t pll_cpu_ctrl; /* 0x000 */ member

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