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Searched refs:port (Results 1 – 25 of 506) sorted by relevance

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/bsp/efm32/Libraries/emlib/src/
A Dem_gpio.c62 #define GPIO_PORT_VALID(port) ((port) <= gpioPortF) argument
104 GPIO->P[port].CTRL = (GPIO->P[port].CTRL & ~(_GPIO_P_CTRL_DRIVEMODE_MASK)) in GPIO_DriveModeSet()
249 GPIO->P[port].MODEL = (GPIO->P[port].MODEL & ~(0xF << (pin * 4))) | in GPIO_PinModeSet()
254 GPIO->P[port].MODEH = (GPIO->P[port].MODEH & ~(0xF << ((pin - 8) * 4))) | in GPIO_PinModeSet()
291 GPIO->P[port].DOUTCLR = 1 << pin; in GPIO_PinOutClear()
335 GPIO->P[port].DOUTSET = 1 << pin; in GPIO_PinOutSet()
358 GPIO->P[port].DOUTTGL = 1 << pin; in GPIO_PinOutToggle()
371 EFM_ASSERT(GPIO_PORT_VALID(port)); in GPIO_PortInGet()
394 EFM_ASSERT(GPIO_PORT_VALID(port)); in GPIO_PortOutClear()
412 EFM_ASSERT(GPIO_PORT_VALID(port)); in GPIO_PortOutGet()
[all …]
/bsp/apm32/libraries/APM32F4xx_Library/APM32F4xx_StdPeriphDriver/src/
A Dapm32f4xx_gpio.c56 if (port == GPIOA) in GPIO_Reset()
60 else if (port == GPIOB) in GPIO_Reset()
64 else if (port == GPIOC) in GPIO_Reset()
68 else if (port == GPIOD) in GPIO_Reset()
186 port->LOCK = temp; in GPIO_ConfigPinLock()
188 port->LOCK = pin; in GPIO_ConfigPinLock()
190 port->LOCK = temp; in GPIO_ConfigPinLock()
192 temp = port->LOCK; in GPIO_ConfigPinLock()
279 port->BSCL = pin; in GPIO_SetBit()
296 port->BSCH = pin; in GPIO_ResetBit()
[all …]
/bsp/hpmicro/libraries/hpm_sdk/drivers/inc/
A Dhpm_gpio_drv.h124 ptr->OE[port].SET = 1 << pin; in gpio_set_pin_output()
231 return ptr->DI[port].VALUE; in gpio_read_port()
243 ptr->DO[port].TOGGLE = mask; in gpio_toggle_port_with_mask()
255 ptr->DO[port].VALUE = value; in gpio_write_port()
267 ptr->DO[port].CLEAR = mask; in gpio_set_port_low_with_mask()
279 ptr->DO[port].SET = mask; in gpio_set_port_high_with_mask()
291 ptr->OE[port].SET = mask; in gpio_enable_port_output_with_mask()
303 ptr->OE[port].CLEAR = mask; in gpio_disable_port_output_with_mask()
316 return ptr->IF[port].VALUE; in gpio_get_port_interrupt_flags()
341 ptr->IE[port].SET = mask; in gpio_enable_port_interrupt_with_mask()
[all …]
/bsp/apm32/libraries/APM32F0xx_Library/APM32F0xx_StdPeriphDriver/src/
A Dapm32f0xx_gpio.c78 if (port == GPIOA) in GPIO_Reset()
83 else if (port == GPIOB) in GPIO_Reset()
88 else if (port == GPIOC) in GPIO_Reset()
93 else if (port == GPIOD) in GPIO_Reset()
188 port->LOCK = val ; in GPIO_ConfigPinLock()
190 port->LOCK = pin; in GPIO_ConfigPinLock()
192 port->LOCK = val; in GPIO_ConfigPinLock()
194 val = port->LOCK; in GPIO_ConfigPinLock()
196 val = port->LOCK; in GPIO_ConfigPinLock()
317 port->BSC = pin; in GPIO_WriteBitValue()
[all …]
/bsp/microchip/samc21/bsp/hpl/port/
A Dhpl_gpio_base.h47 hri_port_clear_DIR_reg(PORT_IOBUS, port, mask); in _gpio_set_direction()
54 hri_port_clear_DIR_reg(PORT_IOBUS, port, mask); in _gpio_set_direction()
57 port, in _gpio_set_direction()
63 hri_port_set_DIR_reg(PORT_IOBUS, port, mask); in _gpio_set_direction()
80 hri_port_set_OUT_reg(PORT_IOBUS, port, mask); in _gpio_set_level()
82 hri_port_clear_OUT_reg(PORT_IOBUS, port, mask); in _gpio_set_level()
91 hri_port_toggle_OUT_reg(PORT_IOBUS, port, mask); in _gpio_toggle_level()
105 tmp = hri_port_read_IN_reg(PORT, port) & ~dir_tmp; in _gpio_get_level()
126 hri_port_set_PINCFG_PULLEN_bit(PORT, port, pin); in _gpio_set_pin_pull_mode()
132 hri_port_set_PINCFG_PULLEN_bit(PORT, port, pin); in _gpio_set_pin_pull_mode()
[all …]
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hpl/port/
A Dhpl_gpio_base.h47 hri_port_clear_DIR_reg(PORT, port, mask); in _gpio_set_direction()
54 hri_port_clear_DIR_reg(PORT, port, mask); in _gpio_set_direction()
57 port, in _gpio_set_direction()
63 hri_port_set_DIR_reg(PORT, port, mask); in _gpio_set_direction()
80 hri_port_set_OUT_reg(PORT, port, mask); in _gpio_set_level()
82 hri_port_clear_OUT_reg(PORT, port, mask); in _gpio_set_level()
91 hri_port_toggle_OUT_reg(PORT, port, mask); in _gpio_toggle_level()
125 hri_port_clear_DIR_reg(PORT, port, 1U << pin); in _gpio_set_pin_pull_mode()
127 hri_port_set_OUT_reg(PORT, port, 1U << pin); in _gpio_set_pin_pull_mode()
131 hri_port_clear_DIR_reg(PORT, port, 1U << pin); in _gpio_set_pin_pull_mode()
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/bsp/microchip/saml10/bsp/hpl/port/
A Dhpl_gpio_base.h47 hri_port_clear_DIR_reg(PORT_IOBUS, port, mask); in _gpio_set_direction()
54 hri_port_clear_DIR_reg(PORT_IOBUS, port, mask); in _gpio_set_direction()
57 port, in _gpio_set_direction()
63 hri_port_set_DIR_reg(PORT_IOBUS, port, mask); in _gpio_set_direction()
80 hri_port_set_OUT_reg(PORT_IOBUS, port, mask); in _gpio_set_level()
82 hri_port_clear_OUT_reg(PORT_IOBUS, port, mask); in _gpio_set_level()
91 hri_port_toggle_OUT_reg(PORT_IOBUS, port, mask); in _gpio_toggle_level()
105 tmp = hri_port_read_IN_reg(PORT, port) & ~dir_tmp; in _gpio_get_level()
126 hri_port_set_PINCFG_PULLEN_bit(PORT, port, pin); in _gpio_set_pin_pull_mode()
132 hri_port_set_PINCFG_PULLEN_bit(PORT, port, pin); in _gpio_set_pin_pull_mode()
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/bsp/microchip/same54/bsp/hpl/port/
A Dhpl_gpio_base.h47 hri_port_clear_DIR_reg(PORT, port, mask); in _gpio_set_direction()
54 hri_port_clear_DIR_reg(PORT, port, mask); in _gpio_set_direction()
57 port, in _gpio_set_direction()
63 hri_port_set_DIR_reg(PORT, port, mask); in _gpio_set_direction()
80 hri_port_set_OUT_reg(PORT, port, mask); in _gpio_set_level()
82 hri_port_clear_OUT_reg(PORT, port, mask); in _gpio_set_level()
91 hri_port_toggle_OUT_reg(PORT, port, mask); in _gpio_toggle_level()
125 hri_port_clear_DIR_reg(PORT, port, 1U << pin); in _gpio_set_pin_pull_mode()
127 hri_port_set_OUT_reg(PORT, port, 1U << pin); in _gpio_set_pin_pull_mode()
131 hri_port_clear_DIR_reg(PORT, port, 1U << pin); in _gpio_set_pin_pull_mode()
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/bsp/microchip/samd51-adafruit-metro-m4/bsp/hpl/port/
A Dhpl_gpio_base.h47 hri_port_clear_DIR_reg(PORT, port, mask); in _gpio_set_direction()
54 hri_port_clear_DIR_reg(PORT, port, mask); in _gpio_set_direction()
57 port, in _gpio_set_direction()
63 hri_port_set_DIR_reg(PORT, port, mask); in _gpio_set_direction()
80 hri_port_set_OUT_reg(PORT, port, mask); in _gpio_set_level()
82 hri_port_clear_OUT_reg(PORT, port, mask); in _gpio_set_level()
91 hri_port_toggle_OUT_reg(PORT, port, mask); in _gpio_toggle_level()
125 hri_port_clear_DIR_reg(PORT, port, 1U << pin); in _gpio_set_pin_pull_mode()
127 hri_port_set_OUT_reg(PORT, port, 1U << pin); in _gpio_set_pin_pull_mode()
131 hri_port_clear_DIR_reg(PORT, port, 1U << pin); in _gpio_set_pin_pull_mode()
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/bsp/apm32/libraries/APM32S10x_Library/APM32S10x_StdPeriphDriver/src/
A Dapm32s10x_gpio.c54 if (port == GPIOA) in GPIO_Reset()
58 else if (port == GPIOB) in GPIO_Reset()
62 else if (port == GPIOC) in GPIO_Reset()
66 else if (port == GPIOD) in GPIO_Reset()
303 port->BSC = pin; in GPIO_WriteBitValue()
307 port->BC = pin ; in GPIO_WriteBitValue()
343 port->LOCK = val ; in GPIO_ConfigPinLock()
345 port->LOCK = pin; in GPIO_ConfigPinLock()
347 port->LOCK = val; in GPIO_ConfigPinLock()
349 val = port->LOCK; in GPIO_ConfigPinLock()
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/bsp/samd21/sam_d2x_asflib/sam0/drivers/system/pinmux/
A Dpinmux.c61 PortGroup *const port, in _system_pinmux_config() argument
65 Assert(port); in _system_pinmux_config()
114 port->WRCONFIG.reg in _system_pinmux_config()
120 port->WRCONFIG.reg in _system_pinmux_config()
184 PortGroup *const port, in system_pinmux_group_set_config() argument
188 Assert(port); in system_pinmux_group_set_config()
209 PortGroup *const port, in system_pinmux_group_set_input_sample_mode() argument
213 Assert(port); in system_pinmux_group_set_input_sample_mode()
239 Assert(port); in system_pinmux_group_set_output_slew_rate()
269 Assert(port); in system_pinmux_group_set_output_strength()
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A Dpinmux.h321 PortGroup *const port,
359 PortGroup *const port,
388 uint32_t pmux_reg = port->PMUX[pin_index / 2].reg; in system_pinmux_pin_get_mux_position()
416 port->CTRL.reg |= (1 << pin_index); in system_pinmux_pin_set_input_sample_mode()
418 port->CTRL.reg &= ~(1 << pin_index); in system_pinmux_pin_set_input_sample_mode()
456 port->PINCFG[pin_index].reg |= PORT_PINCFG_DRVSTR; in system_pinmux_pin_set_output_strength()
459 port->PINCFG[pin_index].reg &= ~PORT_PINCFG_DRVSTR; in system_pinmux_pin_set_output_strength()
464 PortGroup *const port,
510 PortGroup *const port,
546 port->PINCFG[pin_index].reg |= PORT_PINCFG_ODRAIN; in system_pinmux_pin_set_output_drive()
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/bsp/apm32/libraries/APM32E10x_Library/APM32E10x_StdPeriphDriver/src/
A Dapm32e10x_gpio.c54 if (port == GPIOA) in GPIO_Reset()
58 else if (port == GPIOB) in GPIO_Reset()
62 else if (port == GPIOC) in GPIO_Reset()
66 else if (port == GPIOD) in GPIO_Reset()
70 else if (port == GPIOE) in GPIO_Reset()
312 port->BSC = pin; in GPIO_WriteBitValue()
352 port->LOCK = val ; in GPIO_ConfigPinLock()
354 port->LOCK = pin; in GPIO_ConfigPinLock()
356 port->LOCK = val; in GPIO_ConfigPinLock()
358 val = port->LOCK; in GPIO_ConfigPinLock()
[all …]
/bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/
A Dapm32f10x_gpio.c54 if (port == GPIOA) in GPIO_Reset()
58 else if (port == GPIOB) in GPIO_Reset()
62 else if (port == GPIOC) in GPIO_Reset()
66 else if (port == GPIOD) in GPIO_Reset()
70 else if (port == GPIOE) in GPIO_Reset()
312 port->BSC = pin; in GPIO_WriteBitValue()
352 port->LOCK = val ; in GPIO_ConfigPinLock()
354 port->LOCK = pin; in GPIO_ConfigPinLock()
356 port->LOCK = val; in GPIO_ConfigPinLock()
358 val = port->LOCK; in GPIO_ConfigPinLock()
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/bsp/allwinner_tina/drivers/
A Ddrv_gpio.c34 RT_ASSERT((GPIO_PORT_A <= port) && (port < GPIO_PORT_NUM)); in gpio_set_func()
61 RT_ASSERT((GPIO_PORT_A <= port) && (port < GPIO_PORT_NUM)); in gpio_set_value()
88 RT_ASSERT((GPIO_PORT_A <= port) && (port < GPIO_PORT_NUM)); in gpio_get_value()
106 RT_ASSERT((GPIO_PORT_A <= port) && (port < GPIO_PORT_NUM)); in gpio_set_pull_mode()
134 RT_ASSERT((GPIO_PORT_A <= port) && (port < GPIO_PORT_NUM)); in gpio_set_drive_level()
162 RT_ASSERT((GPIO_PORT_A <= port) && (port < GPIO_PORT_NUM)); in gpio_direction_input()
182 RT_ASSERT((GPIO_PORT_A <= port) && (port < GPIO_PORT_NUM)); in gpio_direction_output()
215 RT_ASSERT((GPIO_PORT_C < port) && (port < GPIO_PORT_NUM)); in gpio_select_irq_clock()
231 RT_ASSERT((GPIO_PORT_C < port) && (port < GPIO_PORT_NUM)); in gpio_set_debounce()
248 RT_ASSERT((GPIO_PORT_C < port) && (port < GPIO_PORT_NUM)); in gpio_irq_enable()
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/bsp/allwinner/libraries/sunxi-hal/hal/source/usb/manager/
A Dusb_manager.c177 cfg->port.id_irq_num = Id_Irq;
193 cfg->port.enable = 0; in usb_script_parse()
196 cfg->port.enable = value; in usb_script_parse()
197 if (cfg->port.enable == 0) in usb_script_parse()
210 cfg->port.port_type = value; in usb_script_parse()
224 cfg->port.detect_type = value; in usb_script_parse()
246 cfg->port.id.valid = 1; in usb_script_parse()
247 cfg->port.id.gpio_set.gpio = (gpio_set.port - 1) * 32 + gpio_set.port_num; in usb_script_parse()
264 cfg->port.det_vbus.valid = 1; in usb_script_parse()
265 cfg->port.det_vbus.gpio_set.gpio = (gpio_set.port - 1) * 32 + gpio_set.port_num; in usb_script_parse()
[all …]
/bsp/allwinner/libraries/sunxi-hal/hal/source/cir/
A Dhal_cir.c69 sunxi_cir_t *cir = &sunxi_cir[port]; in sunxi_cir_callback_register()
100 cir->callback(cir->port, RA, 0); in sunxi_cir_handler()
109 sunxi_cir_t *cir = &sunxi_cir[port]; in sunxi_cir_mode_enable()
127 sunxi_cir_t *cir = &sunxi_cir[port]; in sunxi_cir_mode_config()
143 sunxi_cir_t *cir = &sunxi_cir[port]; in sunxi_cir_sample_clock_select()
483 void sunxi_cir_resume(cir_port_t port) in sunxi_cir_resume() argument
500 cir->port = port; in sunxi_cir_init()
501 cir->base = base[port]; in sunxi_cir_init()
502 cir->irq = irq[port]; in sunxi_cir_init()
503 cir->pin = &pin[port]; in sunxi_cir_init()
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/bsp/cvitek/drivers/
A Ddrv_gpio.c38 #define PIN_NUM(port, no) (((((port) & 0xFu) << 8) | ((no) & 0xFFu))) argument
86 rt_uint8_t bit, port; in dwapb_pin_mode() local
91 port = PIN_PORT(pin); in dwapb_pin_mode()
110 rt_uint8_t bit, port; in dwapb_pin_write() local
115 port = PIN_PORT(pin); in dwapb_pin_write()
125 rt_uint8_t bit, port; in dwapb_pin_read() local
129 port = PIN_PORT(pin); in dwapb_pin_read()
174 rt_uint8_t bit, port; in dwapb_pin_attach_irq() local
179 port = PIN_PORT(pin); in dwapb_pin_attach_irq()
267 rt_uint8_t port; in rt_hw_gpio_isr() local
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/bsp/rm48x50/HALCoGen/source/
A Dgio.c227 port->DIR = dir; in gioSetDirection()
252 port->DSET = 1U << bit; in gioSetBit()
256 port->DCLR = 1U << bit; in gioSetBit()
277 port->DOUT = value; in gioSetPort()
322 return port->DIN; in gioGetPort()
345 port->DCLR = 1U << bit; in gioToggleBit()
349 port->DSET = 1U << bit; in gioToggleBit()
371 if (port == gioPORTA) in gioEnableNotification()
375 else if (port == gioPORTB) in gioEnableNotification()
404 if (port == gioPORTA) in gioDisableNotification()
[all …]
/bsp/allwinner/libraries/sunxi-hal/include/hal/
A Dsunxi_hal_cir.h146 cir_port_t port; member
172 void sunxi_cir_mode_enable(cir_port_t port, uint8_t enable);
173 void sunxi_cir_mode_config(cir_port_t port, cir_mode_t mode);
179 void sunxi_cir_fifo_level(cir_port_t port, int8_t size);
180 void sunxi_cir_irq_enable(cir_port_t port, int enable);
181 void sunxi_cir_irq_disable(cir_port_t port);
183 void sunxi_cir_module_enable(cir_port_t port, int8_t enable);
184 cir_status_t sunxi_cir_init(cir_port_t port);
185 void sunxi_cir_deinit(cir_port_t port);
187 void sunxi_cir_suspend(cir_port_t port);
[all …]
/bsp/x86/drivers/include/
A Di386.h15 static __inline unsigned char inb(int port) in inb() argument
18 __asm __volatile("inb %w1,%0" : "=a" (data) : "d" (port)); in inb()
21 static __inline unsigned char inb_p(unsigned short port) in inb_p() argument
27 :"d" ((unsigned short) port)); in inb_p()
31 static __inline unsigned short inw(int port) in inw() argument
38 static __inline unsigned int inl(int port) in inl() argument
45 static __inline void insl(int port, void *addr, int cnt) in insl() argument
49 "d" (port), "0" (addr), "1" (cnt) : in insl()
53 static __inline void outb(int port, unsigned char data) in outb() argument
59 static __inline void outb_p(char value, unsigned short port) in outb_p() argument
[all …]
/bsp/allwinner/libraries/sunxi-hal/hal/source/spi/
A Dhal_spi.c683 sspi->port); in spi_cpu_write()
728 sspi->port); in spi_cpu_read()
781 sspi->port); in spi_dma_tx_config()
786 sspi->port); in spi_dma_tx_config()
939 sspi->port); in spi_dma_rx_config()
944 sspi->port); in spi_dma_rx_config()
1272 switch (sspi->port) in spi_clk_init()
1716 sspi->port = port; in hal_spi_hw_config()
1727 sspi->port); in hal_spi_hw_config()
1769 sspi->port); in hal_spi_hw_config()
[all …]
/bsp/samd21/sam_d2x_asflib/common/services/ioport/
A Dioport.h177 static inline void ioport_enable_port(ioport_port_t port, in ioport_enable_port() argument
180 arch_ioport_enable_port(port, mask); in ioport_enable_port()
200 static inline void ioport_disable_port(ioport_port_t port, in ioport_disable_port() argument
203 arch_ioport_disable_port(port, mask); in ioport_disable_port()
218 arch_ioport_set_port_mode(port, mask, mode); in ioport_set_port_mode()
241 arch_ioport_set_port_mode(port, mask, 0); in ioport_reset_port_mode()
264 arch_ioport_set_port_dir(port, mask, dir); in ioport_set_port_dir()
301 arch_ioport_set_port_level(port, mask, level); in ioport_set_port_level()
328 return arch_ioport_get_port_level(port, mask); in ioport_get_port_level()
351 arch_ioport_toggle_port_level(port, mask); in ioport_toggle_port_level()
[all …]
/bsp/microchip/same70/bsp/hpl/pio/
A Dhpl_gpio_base.h41 static inline void *port_to_reg(const enum gpio_port port) in port_to_reg() argument
44 return (void *)((uint32_t)PIOA + port * 0x200); in port_to_reg()
53 void *const hw = port_to_reg(port); in _gpio_set_direction()
74 void *const hw = port_to_reg(port); in _gpio_set_level()
88 void *const hw = port_to_reg(port); in _gpio_toggle_level()
99 static inline uint32_t _gpio_get_level(const enum gpio_port port) in _gpio_get_level() argument
102 void *const hw = port_to_reg(port); in _gpio_get_level()
113 void *const hw = port_to_reg(port); in _gpio_set_pin_pull_mode()
141 uint8_t port = GPIO_PORT(gpio); in _gpio_set_pin_function() local
143 void *const hw = port_to_reg((enum gpio_port)port); in _gpio_set_pin_function()
[all …]
/bsp/samd21/sam_d2x_asflib/common/services/ioport/sam/
A Dioport_gpio.h51 #define IOPORT_CREATE_PIN(port, pin) ((port) * 32 + (pin)) argument
105 ioport_port_t port) in arch_ioport_port_to_base() argument
108 + port * sizeof(GpioPort)); in arch_ioport_port_to_base()
129 arch_ioport_port_to_base(port)->GPIO_GPERS = mask; in arch_ioport_enable_port()
135 arch_ioport_port_to_base(port)->GPIO_GPERC = mask; in arch_ioport_disable_port()
215 arch_ioport_port_to_base(port)->GPIO_ODERS = mask; in arch_ioport_set_port_dir()
217 arch_ioport_port_to_base(port)->GPIO_STERC = mask; in arch_ioport_set_port_dir()
219 arch_ioport_port_to_base(port)->GPIO_ODERC = mask; in arch_ioport_set_port_dir()
221 arch_ioport_port_to_base(port)->GPIO_STERS = mask; in arch_ioport_set_port_dir()
266 ioport_port_t port, ioport_port_mask_t mask) in arch_ioport_get_port_level() argument
[all …]

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