Searched refs:prefetch (Results 1 – 7 of 7) sorted by relevance
| /bsp/efm32/Libraries/emlib/src/ |
| A D | em_ebi.c | 728 void EBI_BankReadTimingConfig(uint32_t banks, bool pageMode, bool prefetch, bool halfRE) in EBI_BankReadTimingConfig() argument
737 BITBAND_Peripheral(&EBI->RDTIMING, _EBI_RDTIMING_PREFETCH_SHIFT, prefetch); in EBI_BankReadTimingConfig()
743 BITBAND_Peripheral(&EBI->RDTIMING1, _EBI_RDTIMING_PREFETCH_SHIFT, prefetch); in EBI_BankReadTimingConfig()
749 BITBAND_Peripheral(&EBI->RDTIMING2, _EBI_RDTIMING_PREFETCH_SHIFT, prefetch); in EBI_BankReadTimingConfig()
755 BITBAND_Peripheral(&EBI->RDTIMING3, _EBI_RDTIMING_PREFETCH_SHIFT, prefetch); in EBI_BankReadTimingConfig()
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| /bsp/yichip/yc3122-pos/Libraries/sdk/ |
| A D | yc_qspi.h | 176 void prefetch(void *start_addr, void *end_addr);
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| /bsp/ESP32_C3/idf_port/ld/ |
| A D | memory.ld | 24 /* CPU instruction prefetch padding size for flash mmap scenario */
26 /* CPU instruction prefetch padding size for memory protection scenario */
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| A D | sections.ld | 30 /* 16B padding for possible CPU prefetch and 4B alignment for PMS split lines */
421 /** CPU will try to prefetch up to 16 bytes of
580 …/* ESP32-C3 memprot requires 16B padding for possible CPU prefetch and 512B alignment for PMS spli…
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| /bsp/xuantie/xiaohui/c907/ |
| A D | README.md | 23 • 支持指令和数据的 prefetch；
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| /bsp/xuantie/xiaohui/c908/ |
| A D | README.md | 23 • 支持指令和数据的 prefetch；
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| /bsp/efm32/Libraries/emlib/inc/ |
| A D | em_ebi.h | 559 void EBI_BankReadTimingConfig(uint32_t bank, bool pageMode, bool prefetch, bool halfRE);
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