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Searched refs:pstcConfig (Results 1 – 24 of 24) sorted by relevance

/bsp/hc32l136/Libraries/HC32L136_StdPeriph_Driver/src/
A Dtimer3.c400 M0P_TIM3_MODE0->M0CR_f.GATEP = pstcConfig->enGateP; in Tim3_Mode0_Init()
402 M0P_TIM3_MODE0->M0CR_f.PRS = pstcConfig->enPRS; in Tim3_Mode0_Init()
403 M0P_TIM3_MODE0->M0CR_f.TOGEN = pstcConfig->bEnTog; in Tim3_Mode0_Init()
404 M0P_TIM3_MODE0->M0CR_f.CT = pstcConfig->enCT; in Tim3_Mode0_Init()
407 pfnTim3Callback = pstcConfig->pfnTim3Cb; in Tim3_Mode0_Init()
570 M0P_TIM3_MODE1->M1CR_f.PRS = pstcConfig->enPRS; in Tim3_Mode1_Init()
571 M0P_TIM3_MODE1->M1CR_f.CT = pstcConfig->enCT; in Tim3_Mode1_Init()
574 pfnTim3Callback = pstcConfig->pfnTim3Cb; in Tim3_Mode1_Init()
592 M0P_TIM3_MODE1->MSCR_f.TS = pstcConfig->enTsSel; in Tim3_M1_Input_Config()
755 pfnTim3Callback = pstcConfig->pfnTim3Cb; in Tim3_Mode23_Init()
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A Dtimer0.c391 M0P_TIM0_MODE0->M0CR_f.GATEP = pstcConfig->enGateP; in Tim0_Mode0_Init()
392 M0P_TIM0_MODE0->M0CR_f.GATE = pstcConfig->bEnGate; in Tim0_Mode0_Init()
393 M0P_TIM0_MODE0->M0CR_f.PRS = pstcConfig->enPRS; in Tim0_Mode0_Init()
394 M0P_TIM0_MODE0->M0CR_f.TOGEN = pstcConfig->bEnTog; in Tim0_Mode0_Init()
395 M0P_TIM0_MODE0->M0CR_f.CT = pstcConfig->enCT; in Tim0_Mode0_Init()
398 pfnTim0Callback = pstcConfig->pfnTim0Cb; in Tim0_Mode0_Init()
738 M0P_TIM0_MODE23->M23CR_f.PRS = pstcConfig->enPRS; in Tim0_Mode23_Init()
739 M0P_TIM0_MODE23->M23CR_f.CT = pstcConfig->enCT; in Tim0_Mode23_Init()
746 pfnTim0Callback = pstcConfig->pfnTim0Cb; in Tim0_Mode23_Init()
991 M0P_TIM0_MODE23->MSCR_f.TS = pstcConfig->enTsSel; in Tim0_M23_MasterSlave_Set()
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A Dbt.c768 pstcM0PBt->MSCR_f.TS = pstcConfig->enTsSel; in Bt_M1_Input_Config()
769 pstcM0PBt->MSCR_f.IA0S = pstcConfig->enIA0Sel; in Bt_M1_Input_Config()
770 pstcM0PBt->MSCR_f.IB0S = pstcConfig->enIB0Sel; in Bt_M1_Input_Config()
772 pstcM0PBt->FLTR_f.FLTET = pstcConfig->enFltETR; in Bt_M1_Input_Config()
773 pstcM0PBt->FLTR_f.FLTA0 = pstcConfig->enFltIA0; in Bt_M1_Input_Config()
774 pstcM0PBt->FLTR_f.FLTB0 = pstcConfig->enFltIB0; in Bt_M1_Input_Config()
1268 pstcM0PBt->MSCR_f.MMS = pstcConfig->enMasterSrc; in Bt_M23_MasterSlave_Set()
1270 pstcM0PBt->MSCR_f.TS = pstcConfig->enTsSel; in Bt_M23_MasterSlave_Set()
1352 pstcM0PBt->FLTR_f.FLTET = pstcConfig->enETRFlt; in Bt_M23_ETRInput_Config()
1426 pstcM0PBt->DTR_f.DTEN = pstcConfig->bEnDeadTime; in Bt_M23_DT_Config()
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A Dlvd.c217 void Lvd_Init(stc_lvd_config_t *pstcConfig) in Lvd_Init() argument
219 ASSERT(pstcConfig); in Lvd_Init()
220 ASSERT(IS_VALID_INPUT(pstcConfig->enInput)); in Lvd_Init()
221 ASSERT(IS_VALID_THRESHOLD(pstcConfig->enThreshold)); in Lvd_Init()
222 ASSERT(IS_VALID_FILTER(pstcConfig->enFilterTime)); in Lvd_Init()
223 ASSERT(IS_VALID_IRQTYPE(pstcConfig->enIrqType)); in Lvd_Init()
231 M0P_LVD->CR_f.FLTEN = pstcConfig->bFilter; in Lvd_Init()
232 M0P_LVD->CR_f.VTDS = pstcConfig->enThreshold; in Lvd_Init()
233 M0P_LVD->CR_f.SOURCE_SEL = pstcConfig->enInput; in Lvd_Init()
234 M0P_LVD->CR_f.ACT = pstcConfig->bLvdReset; in Lvd_Init()
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A Dlpm.c100 en_result_t Lpm_Config(stc_lpm_config_t* pstcConfig) in Lpm_Config() argument
104 ASSERT(IS_VALID_SEVONPEND(pstcConfig->enSEVONPEND)); in Lpm_Config()
105 ASSERT(IS_VALID_SLEEPDEEP(pstcConfig->enSLEEPDEEP)); in Lpm_Config()
106 ASSERT(IS_VALID_SLEEPONEXIT(pstcConfig->enSLEEPONEXIT)); in Lpm_Config()
108 …SCB->SCR = pstcConfig->enSEVONPEND ? (SCB->SCR | SCB_SCR_SEVONPEND_Msk) : (SCB->SCR & ~SCB_SCR… in Lpm_Config()
109 …SCB->SCR = pstcConfig->enSLEEPDEEP ? (SCB->SCR | SCB_SCR_SLEEPDEEP_Msk) : (SCB->SCR & ~SCB_SCR… in Lpm_Config()
110 …SCB->SCR = pstcConfig->enSLEEPONEXIT ? (SCB->SCR | SCB_SCR_SLEEPONEXIT_Msk) : (SCB->SCR & ~SCB_SCR… in Lpm_Config()
A Ddmac.c262 ASSERT(NULL != pstcConfig); in Dma_InitChannel()
263 ASSERT(IS_VALID_BLKSIZE(pstcConfig->u16BlockSize)); in Dma_InitChannel()
264 ASSERT(IS_VALID_TRNCNT(pstcConfig->u16TransferCnt)); in Dma_InitChannel()
280 M0P_DMAC->CONFB0_f.MODE = pstcConfig->enMode; in Dma_InitChannel()
295 M0P_DMAC->CONFB0_f.FS = pstcConfig->enSrcAddrMode; in Dma_InitChannel()
301 M0P_DMAC->CONFB0_f.FD = pstcConfig->enDstAddrMode; in Dma_InitChannel()
314 M0P_DMAC->CONFB0_f.MSK = pstcConfig->bMsk; in Dma_InitChannel()
321 M0P_DMAC->CONFB1_f.MODE = pstcConfig->enMode; in Dma_InitChannel()
336 M0P_DMAC->CONFB1_f.FS = pstcConfig->enSrcAddrMode; in Dma_InitChannel()
342 M0P_DMAC->CONFB1_f.FD = pstcConfig->enDstAddrMode; in Dma_InitChannel()
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A Dtrim.c240 en_result_t Trim_Init(stc_trim_config_t* pstcConfig) in Trim_Init() argument
244 M0P_CLK_TRIM->CR_f.MON_EN = pstcConfig->enMON; in Trim_Init()
246 if (TrimCalPLL == pstcConfig->enCALCLK) in Trim_Init()
249 M0P_CLK_TRIM->CR_f.CALCLK_SEL = pstcConfig->enCALCLK; in Trim_Init()
254 M0P_CLK_TRIM->CR_f.CALCLK_SEL = pstcConfig->enCALCLK; in Trim_Init()
257 M0P_CLK_TRIM->CR_f.REFCLK_SEL = pstcConfig->enREFCLK; in Trim_Init()
259 M0P_CLK_TRIM->REFCON_f.RCNTVAL = pstcConfig->u32RefCon; in Trim_Init()
260 if(TrimMonEnable == pstcConfig->enMON) in Trim_Init()
262 M0P_CLK_TRIM->CALCON_f.CCNTVAL = pstcConfig->u32CalCon; in Trim_Init()
266 pfnTrimCallback = pstcConfig->pfnTrimCb; in Trim_Init()
A Dlpt.c187 en_result_t Lpt_Init(stc_lpt_config_t* pstcConfig) in Lpt_Init() argument
191 M0P_LPTIMER->CR_f.GATE_P = pstcConfig->enGateP; in Lpt_Init()
192 M0P_LPTIMER->CR_f.GATE = pstcConfig->enGate; in Lpt_Init()
193 M0P_LPTIMER->CR_f.TCK_SEL = pstcConfig->enTckSel; in Lpt_Init()
194 M0P_LPTIMER->CR_f.TOG_EN = pstcConfig->enTog; in Lpt_Init()
195 M0P_LPTIMER->CR_f.CT = pstcConfig->enCT; in Lpt_Init()
196 M0P_LPTIMER->CR_f.MD = pstcConfig->enMD; in Lpt_Init()
198 pfnLpTimCallback = pstcConfig->pfnLpTimCb; in Lpt_Init()
A Dwdt.c90 en_result_t Wdt_Init(stc_wdt_config_t* pstcConfig) in Wdt_Init() argument
93 ASSERT(NULL != pstcConfig); in Wdt_Init()
94 Wdt_WriteWdtLoad(pstcConfig->u8LoadValue); in Wdt_Init()
95 pfnWdtCallback = pstcConfig->pfnWdtIrqCb; in Wdt_Init()
96 M0P_WDT->CON_f.WINT_EN = pstcConfig->enResetEnable; in Wdt_Init()
97 if(pstcConfig->enResetEnable) in Wdt_Init()
A Dlpuart.c922 en_result_t LPUart_Init(uint8_t u8Idx,stc_lpuart_config_t* pstcConfig) in LPUart_Init() argument
932 if(NULL == pstcConfig) in LPUart_Init()
936 if(NULL != pstcConfig->pstcLpuart_clk) in LPUart_Init()
938 LPUart_SelSclk(u8Idx,pstcConfig->pstcLpuart_clk->enSclk_sel); in LPUart_Init()
939 LPUart_SetClkDiv(u8Idx,pstcConfig->pstcLpuart_clk->enSclk_Prs); in LPUart_Init()
941 enRet = LPUart_SetMode(u8Idx,pstcConfig->enRunMode); in LPUart_Init()
942 enRet = LPUart_SetStopBit(u8Idx,pstcConfig->enStopBit); in LPUart_Init()
943 if(NULL != pstcConfig->pstcMultiMode) in LPUart_Init()
945 enRet = LPUart_SetMultiMode(u8Idx,pstcConfig->pstcMultiMode); in LPUart_Init()
947 if(NULL != pstcConfig->pstcIrqCb) in LPUart_Init()
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A Duart.c871 stc_uart_config_t* pstcConfig) in Uart_Init() argument
881 if(NULL == pstcConfig) in Uart_Init()
885 enRet = Uart_SetMode(u8Idx,pstcConfig->enRunMode); in Uart_Init()
886 enRet = Uart_SetStopBit(u8Idx,pstcConfig->enStopBit); in Uart_Init()
887 if(NULL != pstcConfig->pstcMultiMode) in Uart_Init()
889 enRet = Uart_SetMultiMode(u8Idx,pstcConfig->pstcMultiMode); in Uart_Init()
891 if(NULL != pstcConfig->pstcIrqCb) in Uart_Init()
894 pstcData->stcUartInternIrqCb.pfnRxIrqCb = pstcConfig->pstcIrqCb->pfnRxIrqCb; in Uart_Init()
895 pstcData->stcUartInternIrqCb.pfnTxIrqCb = pstcConfig->pstcIrqCb->pfnTxIrqCb; in Uart_Init()
897 pstcData->stcUartInternIrqCb.pfnPEIrqCb = pstcConfig->pstcIrqCb->pfnPEIrqCb; in Uart_Init()
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A Dpca.c365 en_result_t Pca_Init(stc_pca_config_t* pstcConfig) in Pca_Init() argument
369 M0P_PCA->CMOD_f.CIDL = pstcConfig->enCIDL; in Pca_Init()
370 M0P_PCA->CMOD_f.WDTE = pstcConfig->enWDTE; in Pca_Init()
371 M0P_PCA->CMOD_f.CPS = pstcConfig->enCPS; in Pca_Init()
373 pfnPcaCallback = pstcConfig->pfnPcaCb; in Pca_Init()
/bsp/hc32l136/Libraries/HC32L136_StdPeriph_Driver/inc/
A Dtimer3.h692 en_result_t Tim3_Mode0_Init(stc_tim3_mode0_config_t* pstcConfig);
711 en_result_t Tim3_Mode1_Init(stc_tim3_mode1_config_t* pstcConfig);
713 en_result_t Tim3_M1_Input_Config(stc_tim3_pwc_input_config_t* pstcConfig);
729 en_result_t Tim3_Mode23_Init(stc_tim3_mode23_config_t* pstcConfig);
744 en_result_t Tim3_M23_GateFuncSel(stc_tim3_m23_gate_config_t* pstcConfig);
752 en_result_t Tim3_M23_ETRInput_Config(stc_tim3_m23_etr_input_config_t* pstcConfig);
754 en_result_t Tim3_M23_BrakeInput_Config(stc_tim3_m23_bk_input_config_t* pstcConfig);
756 en_result_t Tim3_M23_TrigADC_Config(stc_tim3_m23_adc_trig_config_t* pstcConfig);
758 en_result_t Tim3_M23_DT_Config(stc_tim3_m23_dt_config_t* pstcConfig);
762 en_result_t Tim3_M23_OCRefClr(stc_tim3_m23_OCREF_Clr_config_t* pstcConfig);
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A Dtimer0.h692 en_result_t Tim0_Mode0_Init(stc_tim0_mode0_config_t* pstcConfig);
711 en_result_t Tim0_Mode1_Init(stc_tim0_mode1_config_t* pstcConfig);
713 en_result_t Tim0_M1_Input_Config(stc_tim0_pwc_input_config_t* pstcConfig);
729 en_result_t Tim0_Mode23_Init(stc_tim0_mode23_config_t* pstcConfig);
744 en_result_t Tim0_M23_GateFuncSel(stc_tim0_m23_gate_config_t* pstcConfig);
752 en_result_t Tim0_M23_ETRInput_Config(stc_tim0_m23_etr_input_config_t* pstcConfig);
754 en_result_t Tim0_M23_BrakeInput_Config(stc_tim0_m23_bk_input_config_t* pstcConfig);
756 en_result_t Tim0_M23_TrigADC_Config(stc_tim0_m23_adc_trig_config_t* pstcConfig);
758 en_result_t Tim0_M23_DT_Config(stc_tim0_m23_dt_config_t* pstcConfig);
762 en_result_t Tim0_M23_OCRefClr(stc_tim0_m23_OCREF_Clr_config_t* pstcConfig);
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A Dbt.h674 en_result_t Bt_Mode0_Init(en_bt_unit_t enUnit, stc_bt_mode0_config_t* pstcConfig);
693 en_result_t Bt_Mode1_Init(en_bt_unit_t enUnit, stc_bt_mode1_config_t* pstcConfig);
695 en_result_t Bt_M1_Input_Config(en_bt_unit_t enUnit, stc_bt_pwc_input_config_t* pstcConfig);
711 en_result_t Bt_Mode23_Init(en_bt_unit_t enUnit, stc_bt_mode23_config_t* pstcConfig);
726 en_result_t Bt_M23_GateFuncSel(en_bt_unit_t enUnit,stc_bt_m23_gate_config_t* pstcConfig);
730 en_result_t Bt_M23_PortOutput_Config(en_bt_unit_t enUnit, stc_bt_m23_compare_config_t* pstcConfig);
732 en_result_t Bt_M23_PortInput_Config(en_bt_unit_t enUnit, stc_bt_m23_input_config_t* pstcConfig);
738 en_result_t Bt_M23_TrigADC_Config(en_bt_unit_t enUnit, stc_bt_m23_adc_trig_config_t* pstcConfig);
740 en_result_t Bt_M23_DT_Config(en_bt_unit_t enUnit, stc_bt_m23_dt_config_t* pstcConfig);
744 en_result_t Bt_M23_OCRefClr(en_bt_unit_t enUnit, stc_bt_m23_OCREF_Clr_config_t* pstcConfig);
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A Dlpm.h132 en_result_t Lpm_Config(stc_lpm_config_t* pstcConfig);
A Dwdt.h105 en_result_t Wdt_Init(stc_wdt_config_t* pstcConfig);
A Dtrim.h156 en_result_t Trim_Init(stc_trim_config_t* pstcConfig);
A Dlvd.h192 void Lvd_Init(stc_lvd_config_t *pstcConfig);
A Dlpt.h190 en_result_t Lpt_Init(stc_lpt_config_t* pstcConfig);
A Dpca.h265 en_result_t Pca_Init(stc_pca_config_t* pstcConfig);
A Duart.h247 stc_uart_config_t* pstcConfig);
A Ddmac.h259 en_result_t Dma_InitChannel(en_dma_channel_t enCh, stc_dma_config_t* pstcConfig);
A Dlpuart.h270 stc_lpuart_config_t* pstcConfig);

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