1 /*
2 * Copyright 2020 ETH Zurich
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 *
16 * SPDX-License-Identifier: Apache-2.0
17 * Author: Robert Balas (balasr@iis.ee.ethz.ch)
18 */
19
20 /* Description: Register I/O access
21 */
22
23 #ifndef __PULP_IO_H
24 #define __PULP_IO_H
25
26 #include <stdint.h>
27
28 /* generic I/O write */
writeb(uint8_t val,uintptr_t addr)29 static inline void writeb(uint8_t val, uintptr_t addr)
30 {
31 asm volatile("sb %0, 0(%1)"
32 :
33 : "r"(val), "r"((volatile uint8_t *)addr));
34 }
35
writeh(uint16_t val,uintptr_t addr)36 static inline void writeh(uint16_t val, uintptr_t addr)
37 {
38 asm volatile("sh %0, 0(%1)"
39 :
40 : "r"(val), "r"((volatile uint16_t *)addr));
41 }
42
writew(uint32_t val,uintptr_t addr)43 static inline void writew(uint32_t val, uintptr_t addr)
44 {
45 asm volatile("sw %0, 0(%1)"
46 :
47 : "r"(val), "r"((volatile uint32_t *)addr));
48 }
49
writed(uint64_t val,uintptr_t addr)50 static inline void writed(uint64_t val, uintptr_t addr)
51 {
52 asm volatile("sd %0, 0(%1)"
53 :
54 : "r"(val), "r"((volatile uint64_t *)addr));
55 }
56
57 /* generic I/O read */
readb(const uintptr_t addr)58 static inline uint8_t readb(const uintptr_t addr)
59 {
60 uint8_t val;
61
62 asm volatile("lb %0, 0(%1)"
63 : "=r"(val)
64 : "r"((const volatile uint8_t *)addr));
65 return val;
66 }
67
readh(const uintptr_t addr)68 static inline uint16_t readh(const uintptr_t addr)
69 {
70 uint16_t val;
71
72 asm volatile("lh %0, 0(%1)"
73 : "=r"(val)
74 : "r"((const volatile uint16_t *)addr));
75 return val;
76 }
77
readw(const uintptr_t addr)78 static inline uint32_t readw(const uintptr_t addr)
79 {
80 uint32_t val;
81
82 asm volatile("lw %0, 0(%1)"
83 : "=r"(val)
84 : "r"((const volatile uint32_t *)addr));
85 return val;
86 }
87
readd(const uintptr_t addr)88 static inline uint64_t readd(const uintptr_t addr)
89 {
90 uint64_t val;
91
92 asm volatile("ld %0, 0(%1)"
93 : "=r"(val)
94 : "r"((const volatile uint64_t *)addr));
95 return val;
96 }
97 #endif
98