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Searched refs:refclk (Results 1 – 3 of 3) sorted by relevance

/bsp/loongson/ls2kdev/drivers/
A Dclk.c42 int refclk = 100; variable
65 node_clock = refclk / l1_div_ref * l1_div_loopc / l2_div_out_node; in clk_get_cpu_rate()
80 ddr_clock = refclk / l1_div_ref * l1_div_loopc / l2_div_out_ddr; in clk_get_ddr_rate()
/bsp/hpmicro/libraries/hpm_sdk/drivers/src/
A Dhpm_pllctl_drv.c225 uint32_t fbdiv, frac, refdiv, postdiv, refclk, freq; in pllctl_get_pll_freq_in_hz() local
233 refclk = PLLCTL_SOC_PLL_REFCLK_FREQ / (refdiv * postdiv); in pllctl_get_pll_freq_in_hz()
238 freq = refclk * fbdiv; in pllctl_get_pll_freq_in_hz()
243 freq = (uint32_t)((refclk * (fbdiv + ((double) frac / (1 << 24)))) + 0.5); in pllctl_get_pll_freq_in_hz()
/bsp/samd21/sam_d2x_asflib/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/
A Dclock.c423 uint32_t refclk; in system_clock_source_dpll_set_config() local
425 refclk = config->reference_frequency; in system_clock_source_dpll_set_config()
429 refclk = refclk / (2 * (config->reference_divider + 1)); in system_clock_source_dpll_set_config()
433 tmpldr = (config->output_frequency << 4) / refclk; in system_clock_source_dpll_set_config()
458 (refclk * (((tmpldr + 1) << 4) + tmpldrfrac)) >> 4; in system_clock_source_dpll_set_config()

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