Searched refs:reg_cmd (Results 1 – 12 of 12) sorted by relevance
169 rt_uint32_t reg_cmd; in rthw_sdio_send_command() local192 reg_cmd = cmd->cmd_code | SDMMC_CMD_CPSMEN; in rthw_sdio_send_command()199 reg_cmd |= SDMMC_CMD_CMDTRANS; in rthw_sdio_send_command()209 reg_cmd |= SDMMC_CMD_WAITRESP; in rthw_sdio_send_command()211 reg_cmd |= SDMMC_CMD_WAITRESP_0; in rthw_sdio_send_command()214 hw_sdio->cmd = reg_cmd; in rthw_sdio_send_command()
170 rt_uint32_t reg_cmd; in rthw_sdio_send_command() local193 reg_cmd = cmd->cmd_code | SDMMC_CMD_CPSMEN; in rthw_sdio_send_command()200 reg_cmd |= SDMMC_CMD_CMDTRANS; in rthw_sdio_send_command()210 reg_cmd |= SDMMC_CMD_WAITRESP; in rthw_sdio_send_command()212 reg_cmd |= SDMMC_CMD_WAITRESP_0; in rthw_sdio_send_command()215 hw_sdio->cmd = reg_cmd; in rthw_sdio_send_command()
223 rt_uint32_t reg_cmd = 0; in rthw_sdio_send_command() local236 reg_cmd = cmd->cmd_code | 0x40 | CK8E; in rthw_sdio_send_command()238 reg_cmd = cmd->cmd_code | 0x40; in rthw_sdio_send_command()244 reg_cmd |= CBUSY | CRSP; in rthw_sdio_send_command()247 reg_cmd |= CLRSP | CRSP; in rthw_sdio_send_command()250 reg_cmd |= CRSP; in rthw_sdio_send_command()256 reg_cmd, in rthw_sdio_send_command()293 hw_sdio[SDxCMD] = reg_cmd; in rthw_sdio_send_command()
228 rt_uint32_t reg_cmd; in rthw_sdio_send_command() local250 reg_cmd = cmd->cmd_code | SDMMC_CMD_CPSMEN; in rthw_sdio_send_command()252 reg_cmd |= SDMMC_RESPONSE_NO; in rthw_sdio_send_command()254 reg_cmd |= SDMMC_RESPONSE_LONG; in rthw_sdio_send_command()256 reg_cmd |= SDMMC_RESPONSE_SHORT; in rthw_sdio_send_command()265 reg_cmd |= SDMMC_CMD_CMDTRANS; in rthw_sdio_send_command()274 hw_sdio->cmd = reg_cmd; in rthw_sdio_send_command()
249 rt_uint32_t reg_cmd; in rthw_sdio_send_command() local271 reg_cmd = cmd->cmd_code | SDMMC_CMD_CPSMEN; in rthw_sdio_send_command()274 reg_cmd |= SDMMC_RESPONSE_NO; in rthw_sdio_send_command()278 reg_cmd |= SDMMC_RESPONSE_LONG; in rthw_sdio_send_command()282 reg_cmd |= SDMMC_RESPONSE_SHORT; in rthw_sdio_send_command()291 reg_cmd |= SDMMC_CMD_CMDTRANS; in rthw_sdio_send_command()300 hw_sdio->cmd = reg_cmd; in rthw_sdio_send_command()
197 rt_uint32_t reg_cmd; in rthw_sdio_send_command() local221 reg_cmd = cmd->cmd_code | SDMMC_CMD_CPSMEN; in rthw_sdio_send_command()228 reg_cmd |= SDMMC_CMD_CMDTRANS; in rthw_sdio_send_command()238 reg_cmd |= SDMMC_CMD_WAITRESP; in rthw_sdio_send_command()240 reg_cmd |= SDMMC_CMD_WAITRESP_0; in rthw_sdio_send_command()243 hw_sdio->cmd = reg_cmd; in rthw_sdio_send_command()
222 rt_uint32_t reg_cmd; in swm_sdio_send_command() local244 reg_cmd = (cmd->cmd_code << SDIO_CMD_CMDINDX_Pos) | in swm_sdio_send_command()250 reg_cmd |= SD_RESP_NO << SDIO_CMD_RESPTYPE_Pos; in swm_sdio_send_command()252 reg_cmd |= SD_RESP_128b << SDIO_CMD_RESPTYPE_Pos; in swm_sdio_send_command()254 reg_cmd |= SD_RESP_32b << SDIO_CMD_RESPTYPE_Pos; in swm_sdio_send_command()264 reg_cmd |= (1 << SDIO_CMD_HAVEDATA_Pos) | in swm_sdio_send_command()272 reg_cmd |= (0 << SDIO_CMD_HAVEDATA_Pos); in swm_sdio_send_command()277 swm_sdio->CMD = reg_cmd; in swm_sdio_send_command()
235 rt_uint32_t reg_cmd; in rthw_sdio_send_command() local260 reg_cmd = cmd->cmd_code | SDMMC_CMD_CPSMEN; in rthw_sdio_send_command()267 reg_cmd |= SDMMC_CMD_CMDTRANS; in rthw_sdio_send_command()281 reg_cmd |= SDMMC_RESPONSE_NO; in rthw_sdio_send_command()283 reg_cmd |= SDMMC_RESPONSE_LONG; in rthw_sdio_send_command()285 reg_cmd |= SDMMC_RESPONSE_SHORT; in rthw_sdio_send_command()288 hsd->CMD = reg_cmd; in rthw_sdio_send_command()
265 rt_uint32_t reg_cmd; in rthw_sdio_send_command() local288 reg_cmd = cmd->cmd_code | HW_SDIO_CPSM_ENABLE; in rthw_sdio_send_command()290 reg_cmd |= HW_SDIO_RESPONSE_NO; in rthw_sdio_send_command()292 reg_cmd |= HW_SDIO_RESPONSE_LONG; in rthw_sdio_send_command()294 reg_cmd |= HW_SDIO_RESPONSE_SHORT; in rthw_sdio_send_command()326 hw_sdio->cmd = reg_cmd; in rthw_sdio_send_command()
264 rt_uint32_t reg_cmd; in rt_hw_sdio_send_command() local287 reg_cmd = cmd->cmd_code | HW_SDIO_CPSM_ENABLE; in rt_hw_sdio_send_command()289 reg_cmd |= HW_SDIO_RESPONSE_NO; in rt_hw_sdio_send_command()291 reg_cmd |= HW_SDIO_RESPONSE_LONG; in rt_hw_sdio_send_command()293 reg_cmd |= HW_SDIO_RESPONSE_SHORT; in rt_hw_sdio_send_command()325 hw_sdio->cmd = reg_cmd; in rt_hw_sdio_send_command()
262 rt_uint32_t reg_cmd; in rthw_sdio_send_command() local285 reg_cmd = cmd->cmd_code | HW_SDIO_CPSM_ENABLE; in rthw_sdio_send_command()287 reg_cmd |= HW_SDIO_RESPONSE_NO; in rthw_sdio_send_command()289 reg_cmd |= HW_SDIO_RESPONSE_LONG; in rthw_sdio_send_command()291 reg_cmd |= HW_SDIO_RESPONSE_SHORT; in rthw_sdio_send_command()323 hw_sdio->cmd = reg_cmd; in rthw_sdio_send_command()
Completed in 31 milliseconds