| /bsp/frdm-k64f/device/MK64F12/ |
| A D | fsl_flexbus.c | 87 uint32_t reg_value = 0; in FLEXBUS_Init() local 116 base->CSPMCR = reg_value; in FLEXBUS_Init() 122 reg_value = config->chipBaseAddress; in FLEXBUS_Init() 124 base->CS[chip].CSAR = reg_value; in FLEXBUS_Init() 126 reg_value = 0x1U << FB_CSMR_V_SHIFT; in FLEXBUS_Init() 130 reg_value |= config->chipBaseAddressMask << FB_CSMR_BAM_SHIFT; in FLEXBUS_Init() 132 base->CS[chip].CSMR = reg_value; in FLEXBUS_Init() 140 reg_value |= (uint32_t)config->portSize << FB_CSCR_PS_SHIFT; in FLEXBUS_Init() 146 reg_value |= (uint32_t)config->waitStates << FB_CSCR_WS_SHIFT; in FLEXBUS_Init() 158 base->CS[chip].CSCR = reg_value; in FLEXBUS_Init() [all …]
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| /bsp/nxp/imx/imx6ull-smart/drivers/ |
| A D | bsp_clock.c | 50 rt_uint32_t reg_value; in BOARD_BootClockRUN() local 60 reg_value = CCM->CCSR; in BOARD_BootClockRUN() 66 CCM->CCSR = reg_value; in BOARD_BootClockRUN() 78 reg_value = CCM->CCSR; in BOARD_BootClockRUN() 81 CCM->CCSR = reg_value; in BOARD_BootClockRUN() 93 reg_value &= ~0x3F3F3F3F; in BOARD_BootClockRUN() 98 CCM_ANALOG->PFD_528 = reg_value; in BOARD_BootClockRUN() 108 reg_value &= ~0x3F3F3F3F; in BOARD_BootClockRUN() 113 CCM_ANALOG->PFD_480 = reg_value; in BOARD_BootClockRUN() 118 reg_value = CCM->CSCMR1; in BOARD_BootClockRUN() [all …]
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| A D | drv_uart.c | 176 rt_uint32_t reg_value; in _uart_ops_configure() local 196 reg_value = 0; in _uart_ops_configure() 201 reg_value |= UART_UCR2_WS(0); in _uart_ops_configure() 204 reg_value |= UART_UCR2_WS(1); in _uart_ops_configure() 211 reg_value |= UART_UCR2_STPB(1); in _uart_ops_configure() 214 reg_value |= UART_UCR2_STPB(0); in _uart_ops_configure() 221 reg_value |= UART_UCR2_PREN(1); in _uart_ops_configure() 222 reg_value |= UART_UCR2_PROE(1); in _uart_ops_configure() 225 reg_value |= UART_UCR2_PREN(1); in _uart_ops_configure() 226 reg_value |= UART_UCR2_PROE(0); in _uart_ops_configure() [all …]
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| A D | drv_eth.c | 224 rt_uint32_t reg_value; in rt_imx6ul_eth_init() local 240 reg_value = GPR1->GPR1; in rt_imx6ul_eth_init() 241 reg_value &= ~(IOMUXC_GPR_GPR1_ENET1_CLK_SEL_MASK in rt_imx6ul_eth_init() 243 reg_value |= IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR(1); in rt_imx6ul_eth_init() 244 reg_value |= IOMUXC_GPR_GPR1_ENET1_CLK_SEL(0); in rt_imx6ul_eth_init() 245 GPR1->GPR1 = reg_value; in rt_imx6ul_eth_init() 249 reg_value = GPR1->GPR1; in rt_imx6ul_eth_init() 250 reg_value &= ~(IOMUXC_GPR_GPR1_ENET2_CLK_SEL_MASK in rt_imx6ul_eth_init() 252 reg_value |= IOMUXC_GPR_GPR1_ENET2_TX_CLK_DIR(1); in rt_imx6ul_eth_init() 253 reg_value |= IOMUXC_GPR_GPR1_ENET2_CLK_SEL(0); in rt_imx6ul_eth_init() [all …]
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| /bsp/allwinner/libraries/sunxi-hal/hal/source/usb/host/ |
| A D | sunxi-hci.c | 45 int reg_value = 0; 48 reg_value &= ~mask; 51 reg_value |= val; 149 int reg_value = 0; in USBC_SelectPhyToHci() local 152 reg_value &= ~(0x01); in USBC_SelectPhyToHci() 158 int reg_value = 0; in USBC_Clean_SIDDP() local 171 int reg_value = 0; in sunxi_hci_set_siddq() local 185 int reg_value = 0; in sunxi_hci_set_wakeup_ctrl() local 199 int reg_value = 0; in sunxi_hci_set_rc_clk() local 214 int reg_value = 0; in sunxi_hci_set_standby_irq() local [all …]
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| /bsp/raspberry-pi/raspi4-64/drivers/ |
| A D | drv_gpio.c | 84 uint32_t reg_value = 0; in gpio_set_pud() local 218 rt_uint32_t reg_value; in raspi_pin_attach_irq() local 238 reg_value = GPIO_REG_GPREN0(gpio_base_addr); in raspi_pin_attach_irq() 243 reg_value = GPIO_REG_GPREN1(gpio_base_addr); in raspi_pin_attach_irq() 250 reg_value = GPIO_REG_GPFEN0(gpio_base_addr); in raspi_pin_attach_irq() 255 reg_value = GPIO_REG_GPFEN1(gpio_base_addr); in raspi_pin_attach_irq() 264 reg_value = GPIO_REG_GPFEN0(gpio_base_addr); in raspi_pin_attach_irq() 271 reg_value = GPIO_REG_GPFEN1(gpio_base_addr); in raspi_pin_attach_irq() 278 reg_value = GPIO_REG_GPHEN0(gpio_base_addr); in raspi_pin_attach_irq() 283 reg_value = GPIO_REG_GPHEN1(gpio_base_addr); in raspi_pin_attach_irq() [all …]
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| /bsp/raspberry-pi/raspi4-32/driver/ |
| A D | drv_gpio.c | 84 uint32_t reg_value = 0; in gpio_set_pud() local 218 rt_uint32_t reg_value; in raspi_pin_attach_irq() local 238 reg_value = GPIO_REG_GPREN0(GPIO_BASE); in raspi_pin_attach_irq() 243 reg_value = GPIO_REG_GPREN1(GPIO_BASE); in raspi_pin_attach_irq() 250 reg_value = GPIO_REG_GPFEN0(GPIO_BASE); in raspi_pin_attach_irq() 255 reg_value = GPIO_REG_GPFEN1(GPIO_BASE); in raspi_pin_attach_irq() 264 reg_value = GPIO_REG_GPFEN0(GPIO_BASE); in raspi_pin_attach_irq() 271 reg_value = GPIO_REG_GPFEN1(GPIO_BASE); in raspi_pin_attach_irq() 278 reg_value = GPIO_REG_GPHEN0(GPIO_BASE); in raspi_pin_attach_irq() 283 reg_value = GPIO_REG_GPHEN1(GPIO_BASE); in raspi_pin_attach_irq() [all …]
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| /bsp/raspberry-pi/raspi3-32/driver/ |
| A D | drv_gpio.c | 48 rt_uint32_t reg_value; in gpio_irq_disable() local 61 reg_value = BCM283X_GPIO_GPREN(pin /32); in gpio_irq_disable() 65 reg_value = BCM283X_GPIO_GPFEN(pin /32); in gpio_irq_disable() 69 reg_value = BCM283X_GPIO_GPAREN(pin /32); in gpio_irq_disable() 71 reg_value = BCM283X_GPIO_GPAFEN(pin /32); in gpio_irq_disable() 75 reg_value = BCM283X_GPIO_GPHEN(pin /32); in gpio_irq_disable() 79 reg_value = BCM283X_GPIO_GPLEN(pin /32); in gpio_irq_disable() 155 rt_uint32_t reg_value; in raspi_pin_attach_irq() local 172 reg_value = BCM283X_GPIO_GPREN(pin /32); in raspi_pin_attach_irq() 176 reg_value = BCM283X_GPIO_GPFEN(pin /32); in raspi_pin_attach_irq() [all …]
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| /bsp/raspberry-pi/raspi3-64/driver/ |
| A D | drv_gpio.c | 49 rt_uint32_t reg_value; in gpio_irq_disable() local 62 reg_value = BCM283X_GPIO_GPREN(pin /32); in gpio_irq_disable() 66 reg_value = BCM283X_GPIO_GPFEN(pin /32); in gpio_irq_disable() 70 reg_value = BCM283X_GPIO_GPAREN(pin /32); in gpio_irq_disable() 72 reg_value = BCM283X_GPIO_GPAFEN(pin /32); in gpio_irq_disable() 76 reg_value = BCM283X_GPIO_GPHEN(pin /32); in gpio_irq_disable() 80 reg_value = BCM283X_GPIO_GPLEN(pin /32); in gpio_irq_disable() 156 rt_uint32_t reg_value; in raspi_pin_attach_irq() local 173 reg_value = BCM283X_GPIO_GPREN(pin /32); in raspi_pin_attach_irq() 177 reg_value = BCM283X_GPIO_GPFEN(pin /32); in raspi_pin_attach_irq() [all …]
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| /bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl702/std/src/ |
| A D | bl702_sflash_ext.c | 163 BL702_MemCpy(reg_value, flash_ctrl_buf, reg_len); in bflb_sflash_read_reg_with_cmd() 191 BL702_MemCpy(flash_ctrl_buf, reg_value, reg_len); in bflb_sflash_write_reg_with_cmd() 224 uint32_t reg_value = 0; in bflb_sflash_clear_status_register() local 247 reg_value = (qe_value<<(p_flash_cfg->qe_index*8+p_flash_cfg->qe_bit)); in bflb_sflash_clear_status_register() 248 bflb_sflash_write_reg(p_flash_cfg, 0, (uint8_t *)®_value, 2); in bflb_sflash_clear_status_register() 251 reg_value = (qe_value<<p_flash_cfg->qe_bit); in bflb_sflash_clear_status_register() 253 reg_value = 0; in bflb_sflash_clear_status_register() 255 bflb_sflash_write_reg(p_flash_cfg, 0, (uint8_t *)®_value, 1); in bflb_sflash_clear_status_register() 261 reg_value = (qe_value<<p_flash_cfg->qe_bit); in bflb_sflash_clear_status_register() 263 reg_value = 0; in bflb_sflash_clear_status_register() [all …]
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| A D | bl702_romapi.c | 594 …bflb_sflash_read_reg(spi_flash_cfg_type *flash_cfg, uint8_t reg_index, uint8_t *reg_value, uint8_t… in bflb_sflash_read_reg() argument 596 return RomDriver_SFlash_Read_Reg(flash_cfg, reg_index, reg_value, reg_len); in bflb_sflash_read_reg() 601 …bflb_sflash_write_reg(spi_flash_cfg_type *flash_cfg, uint8_t reg_index, uint8_t *reg_value, uint8_… in bflb_sflash_write_reg() argument 603 return RomDriver_SFlash_Write_Reg(flash_cfg, reg_index, reg_value, reg_len); in bflb_sflash_write_reg() 608 …eg_with_cmd(spi_flash_cfg_type *flash_cfg, uint8_t readRegCmd, uint8_t *reg_value, uint8_t reg_len) in bflb_sflash_read_reg_with_cmd() argument 610 return RomDriver_SFlash_Read_Reg_With_Cmd(flash_cfg, readRegCmd, reg_value, reg_len); in bflb_sflash_read_reg_with_cmd() 617 return RomDriver_SFlash_Write_Reg_With_Cmd(flash_cfg, writeRegCmd, reg_value, reg_len); in bflb_sflash_write_reg_with_cmd() 1037 … ATTR_TCM_SECTION void bflb_psram_readreg(struct spi_psram_cfg_type *psram_cfg, uint8_t *reg_value) in bflb_psram_readreg() argument 1039 RomDriver_Psram_ReadReg(psram_cfg, reg_value); in bflb_psram_readreg() 1042 …ATTR_TCM_SECTION void bflb_psram_writereg(struct spi_psram_cfg_type *psram_cfg, uint8_t *reg_value) in bflb_psram_writereg() argument [all …]
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| /bsp/samd21/sam_d2x_asflib/sam0/drivers/pwm/ |
| A D | pwm.c | 276 uint32_t reg_value; in pwm_set_period() local 280 reg_value = PWM_PERIOD_4; in pwm_set_period() 288 temp |= reg_value; in pwm_set_period() 295 temp |= reg_value; in pwm_set_period() 302 temp |= reg_value; in pwm_set_period() 309 temp |= reg_value; in pwm_set_period() 331 uint32_t reg_value = 0; in pwm_init() local 360 LPMCU_MISC_REGS0->PWM0_CTRL.reg = reg_value; in pwm_init() 364 LPMCU_MISC_REGS0->PWM1_CTRL.reg = reg_value; in pwm_init() 368 LPMCU_MISC_REGS0->PWM2_CTRL.reg = reg_value; in pwm_init() [all …]
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| /bsp/nxp/lpc/lpc55sxx/Libraries/drivers/ |
| A D | drv_sound_wm8904.c | 67 rt_uint16_t reg_value; in wm8904_modify_register() local 75 reg_value &= (uint16_t)~mask; in wm8904_modify_register() 76 reg_value |= value; in wm8904_modify_register() 854 rt_uint16_t reg_value = 0U, reg_mask = 0U; in wm8904_set_channel_mute() local 856 reg_value = is_mute ? 0x180U : 0x80U; in wm8904_set_channel_mute() 906 reg_value = is_enabled ? 3U : 0U; in wm8904_set_module_power() 911 reg_value = is_enabled ? 0xCU : 0U; in wm8904_set_module_power() 916 reg_value = is_enabled ? 3U : 0U; in wm8904_set_module_power() 921 reg_value = is_enabled ? 3U : 0U; in wm8904_set_module_power() 926 reg_value = is_enabled ? 3U : 0U; in wm8904_set_module_power() [all …]
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| /bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl602/std/src/ |
| A D | bl602_sflash_ext.c | 572 uint32_t reg_value = 0; in bflb_sflash_clear_status_register() local 595 reg_value = (qe_value<<(p_flash_cfg->qe_index*8+p_flash_cfg->qe_bit)); in bflb_sflash_clear_status_register() 596 bflb_sflash_write_reg(p_flash_cfg, 0, (uint8_t *)®_value, 2); in bflb_sflash_clear_status_register() 599 reg_value = (qe_value<<p_flash_cfg->qe_bit); in bflb_sflash_clear_status_register() 601 reg_value = 0; in bflb_sflash_clear_status_register() 603 bflb_sflash_write_reg(p_flash_cfg, 0, (uint8_t *)®_value, 1); in bflb_sflash_clear_status_register() 609 reg_value = (qe_value<<p_flash_cfg->qe_bit); in bflb_sflash_clear_status_register() 611 reg_value = 0; in bflb_sflash_clear_status_register() 613 bflb_sflash_write_reg(p_flash_cfg, 1, (uint8_t *)®_value, 1); in bflb_sflash_clear_status_register()
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| A D | bl602_romapi.c | 582 …ash_read_reg(spi_flash_cfg_type *flash_cfg, uint8_t reg_index, uint8_t *reg_value, uint8_t reg_len) in bflb_sflash_read_reg() argument 584 return RomDriver_SFlash_Read_Reg(flash_cfg, reg_index, reg_value, reg_len); in bflb_sflash_read_reg() 588 …sh_write_reg(spi_flash_cfg_type *flash_cfg, uint8_t reg_index, uint8_t *reg_value, uint8_t reg_len) in bflb_sflash_write_reg() argument 590 return RomDriver_SFlash_Write_Reg(flash_cfg, reg_index, reg_value, reg_len); in bflb_sflash_write_reg() 762 …_with_cmd(spi_flash_cfg_type *flash_cfg, uint8_t read_reg_cmd, uint8_t *reg_value, uint8_t reg_len) in bflb_sflash_read_reg_with_cmd() argument 764 return RomDriver_SFlash_Read_Reg_With_Cmd(flash_cfg, read_reg_cmd, reg_value, reg_len); in bflb_sflash_read_reg_with_cmd() 768 …with_cmd(spi_flash_cfg_type *flash_cfg, uint8_t write_reg_cmd, uint8_t *reg_value, uint8_t reg_len) in bflb_sflash_write_reg_with_cmd() argument 770 return RomDriver_SFlash_Write_Reg_With_Cmd(flash_cfg, write_reg_cmd, reg_value, reg_len); in bflb_sflash_write_reg_with_cmd()
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| /bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl702/std/include/ |
| A D | bl702_sflash_ext.h | 81 …b_sflash_read_reg_with_cmd(spi_flash_cfg_type *flash_cfg, uint8_t read_reg_cmd, uint8_t *reg_value, 83 …_sflash_write_reg_with_cmd(spi_flash_cfg_type *flash_cfg, uint8_t read_reg_cmd, uint8_t *reg_value,
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| /bsp/hpmicro/libraries/hpm_sdk/components/camera/mt9m114/ |
| A D | hpm_mt9m114.c | 226 uint32_t reg_value; in mt9m114_modify_register() local 228 status = mt9m114_read_register(context, reg, reg_size, ®_value); in mt9m114_modify_register() 234 reg_value = (reg_value & ~(mask)) | (value & mask); in mt9m114_modify_register() 236 return mt9m114_write_register(context, reg, reg_size, reg_value); in mt9m114_modify_register()
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| /bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/flash/ |
| A D | bflb_sflash.h | 178 int bflb_sflash_read_reg(spi_flash_cfg_type *flash_cfg, uint8_t reg_index, uint8_t *reg_value, uint… 179 int bflb_sflash_write_reg(spi_flash_cfg_type *flash_cfg, uint8_t reg_index, uint8_t *reg_value, uin… 180 …b_sflash_read_reg_with_cmd(spi_flash_cfg_type *flash_cfg, uint8_t read_reg_cmd, uint8_t *reg_value, 182 …sflash_write_reg_with_cmd(spi_flash_cfg_type *flash_cfg, uint8_t write_reg_cmd, uint8_t *reg_value,
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| A D | bflb_sflash.c | 212 arch_memcpy(reg_value, flash_ctrl_buf, reg_len); 241 arch_memcpy(flash_ctrl_buf, reg_value, reg_len); 302 arch_memcpy(reg_value, flash_ctrl_buf, reg_len); 331 arch_memcpy(flash_ctrl_buf, reg_value, reg_len); 1889 uint32_t reg_value = 0; local 1913 bflb_sflash_write_reg(flash_cfg, 0, (uint8_t *)®_value, 2); 1916 reg_value = (qe_value<<flash_cfg->qe_bit); 1918 reg_value = 0; 1920 bflb_sflash_write_reg(flash_cfg, 0, (uint8_t *)®_value, 1); 1926 reg_value = (qe_value<<flash_cfg->qe_bit); [all …]
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| /bsp/yichip/yc3121-pos/Libraries/sdk/ |
| A D | yc_uart.c | 150 uint32_t reg_value = 0; in UART_Init() local 162 reg_value = RX_ENABLE | in UART_Init() 180 UART0_CTRL = reg_value; in UART_Init() 191 UART1_CTRL = reg_value; in UART_Init()
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| /bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/include/ |
| A D | bflb_spi_psram.h | 131 void bflb_psram_readreg(struct spi_psram_cfg_type *psram_cfg, uint8_t *reg_value); 132 void bflb_psram_writereg(struct spi_psram_cfg_type *psram_cfg, uint8_t *reg_value);
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| /bsp/airm2m/air105/libraries/HAL_Driver/Src/ |
| A D | core_uart.c | 533 uint32_t reg_value, read_len; in prvUart_IrqHandle() local 550 reg_value = Uart->MSR; in prvUart_IrqHandle() 555 reg_value = Uart->LSR; in prvUart_IrqHandle() 556 if (reg_value & UART_LSR_TEMT) in prvUart_IrqHandle() 560 if (reg_value & (UART_LSR_PFE|UART_LSR_BI|UART_LSR_FE|UART_LSR_PE|UART_LSR_OE)) in prvUart_IrqHandle() 562 prvUart[UartID].LastError = reg_value; in prvUart_IrqHandle() 569 reg_value = Uart->USR; in prvUart_IrqHandle()
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| /bsp/fujitsu/mb9x/mb9bf568r/CMSIS/Include/ |
| A D | core_cm3.h | 898 uint32_t reg_value; in NVIC_SetPriorityGrouping() local 901 …reg_value = SCB->AIRCR; /* read old register c… in NVIC_SetPriorityGrouping() 902 …reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk); /* clear bits to chang… in NVIC_SetPriorityGrouping() 903 reg_value = (reg_value | in NVIC_SetPriorityGrouping() 906 SCB->AIRCR = reg_value; in NVIC_SetPriorityGrouping()
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| A D | core_cm4.h | 1039 uint32_t reg_value; in NVIC_SetPriorityGrouping() local 1042 …reg_value = SCB->AIRCR; /* read old register c… in NVIC_SetPriorityGrouping() 1043 …reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk); /* clear bits to chang… in NVIC_SetPriorityGrouping() 1044 reg_value = (reg_value | in NVIC_SetPriorityGrouping() 1047 SCB->AIRCR = reg_value; in NVIC_SetPriorityGrouping()
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| /bsp/allwinner/libraries/sunxi-hal/hal/source/ir/ |
| A D | hal_ir.c | 186 uint32_t reg_value; in ir_signal_invert() local 188 reg_value = 0x1 << 2; in ir_signal_invert() 189 hal_writel(reg_value, reg_base + IR_RXCFG_REG); in ir_signal_invert()
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