| /bsp/ti/c28x/libraries/tms320f28379d/headers/cmd/ |
| A D | F2837xD_Headers_nonBIOS_cpu2.cmd | 21 CLA1 : origin = 0x001400, length = 0x000040 /* CLA registers */
32 CPU_TIMER0 : origin = 0x000C00, length = 0x000008 /* CPU Timer0 registers */
33 CPU_TIMER1 : origin = 0x000C08, length = 0x000008 /* CPU Timer1 registers */
34 CPU_TIMER2 : origin = 0x000C10, length = 0x000008 /* CPU Timer2 registers */
75 I2CA : origin = 0x007300, length = 0x000040 /* I2C-A registers */
76 I2CB : origin = 0x007340, length = 0x000040 /* I2C-B registers */
88 MCBSPA : origin = 0x006000, length = 0x000040 /* McBSP-A registers */
95 SCIA : origin = 0x007200, length = 0x000010 /* SCI-A registers */
96 SCIB : origin = 0x007210, length = 0x000010 /* SCI-B registers */
97 SCIC : origin = 0x007220, length = 0x000010 /* SCI-C registers */
[all …]
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| A D | F2837xD_Headers_BIOS_cpu1.cmd | 23 CLA1 : origin = 0x001400, length = 0x000040 /* CLA registers */
36 CPU_TIMER0 : origin = 0x000C00, length = 0x000008 /* CPU Timer0 registers */
83 I2CA : origin = 0x007300, length = 0x000040 /* I2C-A registers */
84 I2CB : origin = 0x007340, length = 0x000040 /* I2C-B registers */
100 MCBSPA : origin = 0x006000, length = 0x000040 /* McBSP-A registers */
101 MCBSPB : origin = 0x006040, length = 0x000040 /* McBSP-A registers */
107 SCIA : origin = 0x007200, length = 0x000010 /* SCI-A registers */
108 SCIB : origin = 0x007210, length = 0x000010 /* SCI-B registers */
109 SCIC : origin = 0x007220, length = 0x000010 /* SCI-C registers */
110 SCID : origin = 0x007230, length = 0x000010 /* SCI-D registers */
[all …]
|
| A D | F2837xD_Headers_nonBIOS_cpu1.cmd | 23 CLA1 : origin = 0x001400, length = 0x000040 /* CLA registers */
36 CPU_TIMER0 : origin = 0x000C00, length = 0x000008 /* CPU Timer0 registers */
83 I2CA : origin = 0x007300, length = 0x000040 /* I2C-A registers */
84 I2CB : origin = 0x007340, length = 0x000040 /* I2C-B registers */
100 MCBSPA : origin = 0x006000, length = 0x000040 /* McBSP-A registers */
101 MCBSPB : origin = 0x006040, length = 0x000040 /* McBSP-A registers */
107 SCIA : origin = 0x007200, length = 0x000010 /* SCI-A registers */
108 SCIB : origin = 0x007210, length = 0x000010 /* SCI-B registers */
109 SCIC : origin = 0x007220, length = 0x000010 /* SCI-C registers */
110 SCID : origin = 0x007230, length = 0x000010 /* SCI-D registers */
[all …]
|
| A D | F2837xD_Headers_BIOS_cpu2.cmd | 21 CLA1 : origin = 0x001400, length = 0x000040 /* CLA registers */
32 CPU_TIMER0 : origin = 0x000C00, length = 0x000008 /* CPU Timer0 registers */
33 CPU_TIMER1 : origin = 0x000C08, length = 0x000008 /* CPU Timer1 registers */
34 CPU_TIMER2 : origin = 0x000C10, length = 0x000008 /* CPU Timer2 registers */
75 I2CA : origin = 0x007300, length = 0x000040 /* I2C-A registers */
76 I2CB : origin = 0x007340, length = 0x000040 /* I2C-B registers */
88 MCBSPA : origin = 0x006000, length = 0x000040 /* McBSP-A registers */
96 SCIA : origin = 0x007200, length = 0x000010 /* SCI-A registers */
97 SCIB : origin = 0x007210, length = 0x000010 /* SCI-B registers */
98 SCIC : origin = 0x007220, length = 0x000010 /* SCI-C registers */
[all …]
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| /bsp/m16c62p/drivers/ |
| A D | interrupts_gcc.S | 25 …POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore all processor registers from the new task's …
32 PUSHM R0,R1,R2,R3,A0,A1,SB,FB ; Save current task's registers
47 PUSHM R0,R1,R2,R3,A0,A1,SB,FB ; Save current task's registers
|
| A D | interrupts_iar.asm | 36 …POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore all processor registers from the new task's …
41 PUSHM R0,R1,R2,R3,A0,A1,SB,FB ; Save current task's registers
54 PUSHM R0,R1,R2,R3,A0,A1,SB,FB ; Save current task's registers
|
| /bsp/microchip/same70/bsp/documentation/ |
| A D | ethernet_phy.rst | 19 basic registers. The GMII also uses the same two basic registers and adds a
22 The MII basic register set consists of two registers referred to as the Control
31 used (Clause 28 or Clause 37). The format of these registers is selected by
|
| /bsp/microchip/same54/bsp/documentation/ |
| A D | ethernet_phy.rst | 19 basic registers. The GMII also uses the same two basic registers and adds a
22 The MII basic register set consists of two registers referred to as the Control
31 used (Clause 28 or Clause 37). The format of these registers is selected by
|
| /bsp/nuvoton/libraries/m460/rtt_port/ |
| A D | drv_common.c | 192 MSH_CMD_EXPORT(devmem, dump device registers);
226 MSH_CMD_EXPORT(devmem2, dump device registers);
|
| /bsp/gd32/risc-v/libraries/GD32VF103_Firmware_Library/RISCV/env_Eclipse/ |
| A D | entry.S | 22 #Save caller registers
85 #restore caller registers
149 #restore caller registers
172 #restore caller registers
|
| /bsp/Infineon/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/ |
| A D | gdbinit | 28 # Print registers
|
| A D | gdbinit_secure | 30 # Print registers
|
| /bsp/nuvoton/libraries/n9h30/rtt_port/ |
| A D | drv_common.c | 115 MSH_CMD_EXPORT(devmem, dump device registers);
|
| /bsp/microchip/same70/bsp/hal/documentation/ |
| A D | mac_async.rst | 18 * Reading/writing PHY registers
|
| /bsp/microchip/same54/bsp/hal/documentation/ |
| A D | mac_async.rst | 18 * Reading/writing PHY registers
|
| /bsp/nuvoton/libraries/ma35/rtt_port/ |
| A D | drv_sys.c | 332 MSH_CMD_EXPORT(devmem, dump device registers);
367 MSH_CMD_EXPORT(devmem2, dump device registers);
|
| /bsp/stm32/stm32g030-tiny-board/ |
| A D | README.md | 13 VBAT direct battery input allows keeping RTC and backup registers powered.
29 - VBAT supply for RTC and backup registers
|
| /bsp/stm32/stm32g070-st-nucleo/ |
| A D | README.md | 11 VBAT direct battery input allows keeping RTC and backup registers powered.
26 - VBAT supply for RTC and backup registers
|
| /bsp/core-v-mcu/core-v-cv32e40p/ |
| A D | readme.md | 163 文件路径`OpenHW/CORE-V-SDKv0.0.0.4/registers/csr`,具体路径根据用户安装的SDK路径配置。
169 文件路径`/home/wangshun/OpenHW/CORE-V-SDKv0.0.0.4/registers/peripheral`,具体路径根据用户安装的SDK路径配置。
|
| /bsp/Infineon/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/vscode/ |
| A D | launch.json | 30 … // Or, execution context (PC, stack, registers, etc.) look like they are from before reset.
|
| /bsp/Infineon/libraries/templates/XMC7200D/libs/TARGET_APP_KIT_XMC72_EVK/COMPONENT_CM0P/TOOLCHAIN_ARM/ |
| A D | startup_cm0plus.s | 108 … ; Generic code can be used, even if RAMx_CTL0 (x > 0) registers are not implemented in a device
109 …; or if no ECC_CHECK_DIS bits are available in the registers in case of m4cpuss with 32-bit ECC SR…
|
| /bsp/Infineon/xmc7100d-f144k4160aa/libs/TARGET_APP_KIT_XMC71_EVK_LITE_V2/COMPONENT_CM0P/TOOLCHAIN_ARM/ |
| A D | startup_cm0plus.s | 108 … ; Generic code can be used, even if RAMx_CTL0 (x > 0) registers are not implemented in a device
109 …; or if no ECC_CHECK_DIS bits are available in the registers in case of m4cpuss with 32-bit ECC SR…
|
| /bsp/Infineon/xmc7200-kit_xmc7200_evk/libs/TARGET_APP_KIT_XMC72_EVK/COMPONENT_CM0P/TOOLCHAIN_ARM/ |
| A D | startup_cm0plus.s | 108 … ; Generic code can be used, even if RAMx_CTL0 (x > 0) registers are not implemented in a device
109 …; or if no ECC_CHECK_DIS bits are available in the registers in case of m4cpuss with 32-bit ECC SR…
|
| /bsp/stm32/stm32g071-st-nucleo/ |
| A D | README.md | 11 VBAT direct battery input allows keeping RTC and backup registers powered.
28 - VBAT supply for RTC and backup registers
|
| /bsp/apm32/libraries/APM32F0xx_Library/APM32F0xx_StdPeriphDriver/src/ |
| A D | apm32f0xx_i2c.c | 947 uint32_t I2C_ReadRegister(I2C_T* i2c, uint8_t registers) in I2C_ReadRegister() argument
952 temp += registers; in I2C_ReadRegister()
|