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Searched refs:rt_uint32_t (Results 1 – 25 of 1293) sorted by relevance

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/bsp/allwinner_tina/drivers/
A Ddrv_gpio.h131 volatile rt_uint32_t pa_cfg0; /* 0x00 */
132 volatile rt_uint32_t pa_cfg1; /* 0x04 */
133 volatile rt_uint32_t pa_cfg2; /* 0x08 */
134 volatile rt_uint32_t pa_cfg3; /* 0x0C */
135 volatile rt_uint32_t pa_data; /* 0x10 */
136 volatile rt_uint32_t pa_drv0; /* 0x14 */
137 volatile rt_uint32_t pa_drv1; /* 0x18 */
184 volatile rt_uint32_t reserved0[76];
192 volatile rt_uint32_t reserved1;
200 volatile rt_uint32_t reserved2;
[all …]
A Ddrv_clock.h142 volatile rt_uint32_t reserved0;
144 volatile rt_uint32_t reserved1;
146 volatile rt_uint32_t reserved2;
148 volatile rt_uint32_t reserved3;
150 volatile rt_uint32_t reserved4;
152 volatile rt_uint32_t reserved5[9];
155 volatile rt_uint32_t reserved6[2];
159 volatile rt_uint32_t reserved7[7];
171 volatile rt_uint32_t reserved11;
180 volatile rt_uint32_t reserved14;
[all …]
A Ddrv_sdio.h40 volatile rt_uint32_t reserved0;
42 volatile rt_uint32_t reserved1[7];
44 volatile rt_uint32_t reserved2;
51 volatile rt_uint32_t reserved3[26];
53 volatile rt_uint32_t reserved4[2];
55 volatile rt_uint32_t reserved5[12];
56 volatile rt_uint32_t reserved6[48];
148 rt_uint32_t : 1,
160 rt_uint32_t data_buf1_sz : 16,
162 rt_uint32_t buf_addr_ptr1;
[all …]
A Ddrv_uart.h41 volatile rt_uint32_t rx_tx_dll; /* 0x00 */
42 volatile rt_uint32_t dlh_ier; /* 0x04 */
43 volatile rt_uint32_t iir_fcr; /* 0x08 */
44 volatile rt_uint32_t lcr; /* 0x0C */
45 volatile rt_uint32_t mcr; /* 0x10 */
46 volatile rt_uint32_t lsr; /* 0x14 */
47 volatile rt_uint32_t msr; /* 0x18 */
48 volatile rt_uint32_t sch; /* 0x1C */
49 volatile rt_uint32_t reserved0[23];
54 volatile rt_uint32_t reserved1[6];
[all …]
/bsp/stm32/stm32mp157a-st-ev1/board/ports/
A Ddrv_emmc.h53 volatile rt_uint32_t power; /* offset 0x00 */
54 volatile rt_uint32_t clkcr; /* offset 0x04 */
55 volatile rt_uint32_t arg; /* offset 0x08 */
76 volatile rt_uint32_t idmalar;
77 volatile rt_uint32_t idmabar;
78 volatile rt_uint32_t reserved2[5];
79 volatile rt_uint32_t fifo;
80 volatile rt_uint32_t reserved3[220];
81 volatile rt_uint32_t verr;
82 volatile rt_uint32_t ipidr;
[all …]
/bsp/stm32/stm32mp157a-st-discovery/board/ports/
A Ddrv_sdio.h67 volatile rt_uint32_t power; /* offset 0x00 */
68 volatile rt_uint32_t clkcr; /* offset 0x04 */
69 volatile rt_uint32_t arg; /* offset 0x08 */
90 volatile rt_uint32_t idmalar;
91 volatile rt_uint32_t idmabar;
92 volatile rt_uint32_t reserved2[5];
93 volatile rt_uint32_t fifo;
94 volatile rt_uint32_t reserved3[220];
95 volatile rt_uint32_t verr;
96 volatile rt_uint32_t ipidr;
[all …]
/bsp/qemu-vexpress-a9/drivers/audio/
A Ddrv_pl041.h154 volatile rt_uint32_t rxcr1; /* 0x000 */
155 volatile rt_uint32_t txcr1; /* 0x004 */
156 volatile rt_uint32_t sr1; /* 0x008 */
157 volatile rt_uint32_t isr1; /* 0x00c */
158 volatile rt_uint32_t iie1; /* 0x010 */
159 volatile rt_uint32_t rxcr2; /* 0x014 */
160 volatile rt_uint32_t txcr2; /* 0x018 */
161 volatile rt_uint32_t sr2; /* 0x01c */
189 volatile rt_uint32_t res08c;
202 rt_uint32_t itype;
[all …]
/bsp/k230/drivers/interdrv/pinctl/
A Ddrv_pinctrl.h12 #define IOMUX_FUNC1 (rt_uint32_t)0
13 #define IOMUX_FUNC2 (rt_uint32_t)1
14 #define IOMUX_FUNC3 (rt_uint32_t)2
17 void k230_pinctrl_set_function(rt_uint32_t pin, rt_uint32_t func);
18 void k230_pinctrl_set_ie(rt_uint32_t pin, rt_uint32_t ie);
19 void k230_pinctrl_set_oe(rt_uint32_t pin, rt_uint32_t oe);
20 void k230_pinctrl_set_pu(rt_uint32_t pin, rt_uint32_t pu);
21 void k230_pinctrl_set_pd(rt_uint32_t pin, rt_uint32_t pd);
22 void k230_pinctrl_set_drv(rt_uint32_t pin, rt_uint32_t drv);
23 void k230_pinctrl_set_st(rt_uint32_t pin, rt_uint32_t st);
[all …]
A Ddrv_pinctrl.c49 rt_inline rt_uint32_t _read32(rt_uint32_t pin) in _read32()
54 rt_inline void _write32(rt_uint32_t pin, rt_uint32_t value) in _write32()
59 void k230_pinctrl_set_function(rt_uint32_t pin, rt_uint32_t func) in k230_pinctrl_set_function()
66 rt_uint32_t val = _read32(pin); in k230_pinctrl_set_function()
73 void k230_pinctrl_set_ie(rt_uint32_t pin, rt_uint32_t ie) in k230_pinctrl_set_ie()
86 void k230_pinctrl_set_oe(rt_uint32_t pin, rt_uint32_t oe) in k230_pinctrl_set_oe()
99 void k230_pinctrl_set_pu(rt_uint32_t pin, rt_uint32_t pu) in k230_pinctrl_set_pu()
112 void k230_pinctrl_set_pd(rt_uint32_t pin, rt_uint32_t pd) in k230_pinctrl_set_pd()
125 void k230_pinctrl_set_drv(rt_uint32_t pin, rt_uint32_t drv) in k230_pinctrl_set_drv()
132 void k230_pinctrl_set_st(rt_uint32_t pin, rt_uint32_t st) in k230_pinctrl_set_st()
[all …]
/bsp/dm365/drivers/
A Dmmcsd.h100 volatile rt_uint32_t MMCCTL;
101 volatile rt_uint32_t MMCCLK;
102 volatile rt_uint32_t MMCST0;
103 volatile rt_uint32_t MMCST1;
104 volatile rt_uint32_t MMCIM;
105 volatile rt_uint32_t MMCTOR;
106 volatile rt_uint32_t MMCTOD;
107 volatile rt_uint32_t MMCBLEN;
110 volatile rt_uint32_t MMCDRR;
111 volatile rt_uint32_t MMCDXR;
[all …]
A Ddavinci_emac.h307 rt_uint32_t num_bd;
308 rt_uint32_t service_max;
311 rt_uint32_t alloc_size;
351 rt_uint32_t num_bd;
352 rt_uint32_t service_max;
353 rt_uint32_t buf_size;
357 rt_uint32_t alloc_size;
445 rt_uint32_t isr_count;
449 rt_uint32_t mac_hash1;
450 rt_uint32_t mac_hash2;
[all …]
/bsp/stm32/stm32h743-atk-apollo/board/ports/
A Ddrv_sdio.h62 volatile rt_uint32_t power; /* offset 0x00 */
63 volatile rt_uint32_t clkcr; /* offset 0x04 */
64 volatile rt_uint32_t arg; /* offset 0x08 */
65 volatile rt_uint32_t cmd; /* offset 0x0C */
66 volatile rt_uint32_t respcmd; /* offset 0x10 */
67 volatile rt_uint32_t resp1; /* offset 0x14 */
68 volatile rt_uint32_t resp2; /* offset 0x18 */
69 volatile rt_uint32_t resp3; /* offset 0x1C */
70 volatile rt_uint32_t resp4; /* offset 0x20 */
71 volatile rt_uint32_t dtimer; /* offset 0x24 */
[all …]
/bsp/stm32/stm32h743-openmv-h7plus/board/ports/
A Ddrv_sdio.h62 volatile rt_uint32_t power; /* offset 0x00 */
63 volatile rt_uint32_t clkcr; /* offset 0x04 */
64 volatile rt_uint32_t arg; /* offset 0x08 */
65 volatile rt_uint32_t cmd; /* offset 0x0C */
66 volatile rt_uint32_t respcmd; /* offset 0x10 */
67 volatile rt_uint32_t resp1; /* offset 0x14 */
68 volatile rt_uint32_t resp2; /* offset 0x18 */
69 volatile rt_uint32_t resp3; /* offset 0x1C */
70 volatile rt_uint32_t resp4; /* offset 0x20 */
71 volatile rt_uint32_t dtimer; /* offset 0x24 */
[all …]
/bsp/stm32/stm32h750-artpi/board/port/
A Ddrv_sdio.h67 volatile rt_uint32_t power; /* offset 0x00 */
68 volatile rt_uint32_t clkcr; /* offset 0x04 */
69 volatile rt_uint32_t arg; /* offset 0x08 */
70 volatile rt_uint32_t cmd; /* offset 0x0C */
71 volatile rt_uint32_t respcmd; /* offset 0x10 */
72 volatile rt_uint32_t resp1; /* offset 0x14 */
73 volatile rt_uint32_t resp2; /* offset 0x18 */
74 volatile rt_uint32_t resp3; /* offset 0x1C */
75 volatile rt_uint32_t resp4; /* offset 0x20 */
76 volatile rt_uint32_t dtimer; /* offset 0x24 */
[all …]
/bsp/zynqmp-a53-dfzu2eg/drivers/
A Ddrv_uart.c30 rt_uint32_t irqno;
31 rt_uint32_t in_clk;
36 rt_uint32_t reg_triger; in _uart_set_fifo_threshold()
42 reg_triger = ((rt_uint32_t)trigger_level) & (rt_uint32_t)XUARTPS_RXWM_MASK; in _uart_set_fifo_threshold()
72 rt_uint32_t percent_error; in _uart_baudrate_init()
73 rt_uint32_t mode_reg; in _uart_baudrate_init()
74 rt_uint32_t input_clk; in _uart_baudrate_init()
75 rt_uint32_t temp_reg; in _uart_baudrate_init()
141 ((rt_uint32_t)XUARTPS_CR_RX_DIS | (rt_uint32_t)XUARTPS_CR_TX_DIS)); in _uart_baudrate_init()
153 ((rt_uint32_t)XUARTPS_CR_RX_EN | (rt_uint32_t)XUARTPS_CR_TX_EN)); in _uart_baudrate_init()
[all …]
/bsp/dm365/platform/
A Ddm36x.h214 rt_uint32_t r0;
215 rt_uint32_t r1;
216 rt_uint32_t r2;
217 rt_uint32_t r3;
218 rt_uint32_t r4;
219 rt_uint32_t r5;
220 rt_uint32_t r6;
221 rt_uint32_t r7;
222 rt_uint32_t r8;
223 rt_uint32_t r9;
[all …]
/bsp/at91/at91sam9260/drivers/
A Dboard.c100 rt_uint32_t pit_rate; in at91sam926x_pit_init()
101 rt_uint32_t bits; in at91sam926x_pit_init()
145 volatile rt_uint32_t CR;
146 volatile rt_uint32_t MR;
147 volatile rt_uint32_t IER;
148 volatile rt_uint32_t IDR;
149 volatile rt_uint32_t IMR;
150 volatile rt_uint32_t CSR;
151 volatile rt_uint32_t RHR;
152 volatile rt_uint32_t THR;
[all …]
/bsp/mini4020/drivers/
A Dsdcard.h26 __IO rt_uint32_t clk_ctl;
27 __IO rt_uint32_t soft_rst;
28 __IO rt_uint32_t arg;
29 __IO rt_uint32_t cmd;
30 __IO rt_uint32_t blk_sz;
31 __IO rt_uint32_t blk_cnt;
33 __O rt_uint32_t response0;
34 __O rt_uint32_t response1;
38 __IO rt_uint32_t int_stat;
40 __O rt_uint32_t rx_fifo;
[all …]
/bsp/rockchip/rk3500/driver/clk/
A Dclk-rk3588.h28 rt_uint32_t aclk_div;
29 rt_uint32_t pclk_div;
38 rt_uint32_t nr;
39 rt_uint32_t nf;
40 rt_uint32_t no;
41 rt_uint32_t nb;
54 rt_uint32_t m;
55 rt_uint32_t p;
56 rt_uint32_t s;
57 rt_uint32_t k;
[all …]
A Dclk-rk3568.h28 rt_uint32_t aclk_div;
29 rt_uint32_t pclk_div;
35 rt_uint32_t nr;
36 rt_uint32_t nf;
37 rt_uint32_t no;
38 rt_uint32_t nb;
40 rt_uint32_t fbdiv;
42 rt_uint32_t refdiv;
44 rt_uint32_t dsmpd;
45 rt_uint32_t frac;
[all …]
/bsp/stm32/libraries/HAL_Drivers/drivers/
A Ddrv_sdio.h137 volatile rt_uint32_t power;
138 volatile rt_uint32_t clkcr;
139 volatile rt_uint32_t arg;
140 volatile rt_uint32_t cmd;
147 volatile rt_uint32_t dlen;
150 volatile rt_uint32_t sta;
151 volatile rt_uint32_t icr;
152 volatile rt_uint32_t mask;
156 volatile rt_uint32_t fifo;
159 typedef rt_err_t (*dma_txconfig)(rt_uint32_t *src, rt_uint32_t *dst, int size);
[all …]
/bsp/allwinner_tina/libcpu/
A Dmmu.c15 void mmu_setttbase(rt_uint32_t i) in mmu_setttbase()
17 register rt_uint32_t value; in mmu_setttbase()
38 register rt_uint32_t value; in mmu_enable()
137 void mmu_clean_invalidated_dcache(rt_uint32_t buffer, rt_uint32_t size) in mmu_clean_invalidated_dcache()
150 void mmu_clean_dcache(rt_uint32_t buffer, rt_uint32_t size) in mmu_clean_dcache()
163 void mmu_invalidate_dcache(rt_uint32_t buffer, rt_uint32_t size) in mmu_invalidate_dcache()
327 void mmu_clean_invalidated_dcache(rt_uint32_t buffer, rt_uint32_t size) in mmu_clean_invalidated_dcache()
342 void mmu_clean_dcache(rt_uint32_t buffer, rt_uint32_t size) in mmu_clean_dcache()
356 void mmu_invalidate_dcache(rt_uint32_t buffer, rt_uint32_t size) in mmu_invalidate_dcache()
398 void mmu_setmtt(rt_uint32_t vaddrStart, rt_uint32_t vaddrEnd, in mmu_setmtt()
[all …]
/bsp/rockchip/common/drivers/
A Ddrv_heap.c29 (rt_uint32_t)end_addr - (rt_uint32_t)begin_addr); in rt_uncache_heap_init()
54 (rt_uint32_t)end_addr - (rt_uint32_t)begin_addr); in rt_large_heap_init()
97 if (((rt_uint32_t)ptr & (align - 1)) == 0) in rt_dma_malloc_large()
107 *((rt_uint32_t *)((rt_uint32_t)align_ptr - sizeof(void *))) = (rt_uint32_t)ptr; in rt_dma_malloc_large()
120 real_ptr = (void *) * (rt_uint32_t *)((rt_uint32_t)ptr - sizeof(void *)); in rt_dma_free_large()
151 (rt_uint32_t)RK_DTCM_END - (rt_uint32_t)RK_DTCM_BEGIN); in rt_dtcm_heap_init()
209 *((rt_uint32_t *)((rt_uint32_t)align_ptr - sizeof(void *))) = (rt_uint32_t)ptr; in rt_dma_malloc_dtcm()
222 real_ptr = (void *) * (rt_uint32_t *)((rt_uint32_t)ptr - sizeof(void *)); in rt_dma_free_dtcm()
244 (rt_uint32_t)RK_PSRAMHEAP_END - (rt_uint32_t)RK_PSRAMHEAP_BEGIN); in rt_psram_heap_init()
300 *((rt_uint32_t *)((rt_uint32_t)align_ptr - sizeof(void *))) = (rt_uint32_t)ptr; in rt_dma_malloc_psram()
[all …]
/bsp/apm32/libraries/Drivers/
A Ddrv_sdio.h161 volatile rt_uint32_t power;
163 volatile rt_uint32_t arg;
164 volatile rt_uint32_t cmd;
171 volatile rt_uint32_t dlen;
174 volatile rt_uint32_t sta;
175 volatile rt_uint32_t icr;
176 volatile rt_uint32_t mask;
180 volatile rt_uint32_t fifo;
183 typedef rt_err_t (*dma_txconfig)(rt_uint32_t *src, rt_uint32_t *dst, int size);
184 typedef rt_err_t (*dma_rxconfig)(rt_uint32_t *src, rt_uint32_t *dst, int size);
[all …]
/bsp/k230/drivers/interdrv/pdma/
A Ddrv_pdma.h210 volatile rt_uint32_t reserved0 : 1;
212 volatile rt_uint32_t reserved1 : 2;
216 volatile rt_uint32_t reserved2 : 4;
223 volatile rt_uint32_t ch_ctl;
224 volatile rt_uint32_t ch_status;
226 volatile rt_uint32_t ch_llt_saddr;
227 volatile rt_uint32_t reserved[4];
234 volatile rt_uint32_t pdma_ch_en;
235 volatile rt_uint32_t dma_int_mask;
236 volatile rt_uint32_t dma_int_stat;
[all …]

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