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/bsp/upd70f3454/
A Dlnk70f3454.xcl35 // _BASE -- An empty placeholder segment that should be placed
37 // _CBASE -- An empty placeholder segment that should be placed
93 // BREL_CBASE is an empty placeholer segment, it should be placed in
106 // The CHECKSUM segment must be defined when ROM checksum should
118 // SADDR_BASE is an empty segment that mark the beginning of the saddr
127 // BREL_BASE is an empty placeholer segment, it should be placed in
135 // by BREL segment variables) is addressed with HUGE memory model.
141 // This segment is for TINY data model. All internal memory, SFR,
/bsp/upd70f3454/drivers/
A Dcstartup.asm80 ;; modules and segment parts defined in this file.
153 ; must be handled or if the segment init should not be ;
720 ; This empty segment should be places in front of the brel ;
737 ; This empty segment should be places in front of the brel ;
738 ; ROM data segment. ;
754 ; This empty segment should be places in front of the saddr ;
/bsp/ESP32_C3/idf_port/ld/
A Dmemory.ld49 * has a 0x18 byte file header, and each segment has a 0x08 byte segment
80 * If rodata default segment is placed in `drom0_0_seg`, then flash's first rodata section must
81 * also be first in the segment.
84 ".flash_rodata_dummy section must be placed at the beginning of the rodata segment.")
/bsp/phytium/libraries/drivers/
A Ddrv_can.c100 arb_segment_config.segment = FCAN_ARB_SEGMENT; in _can_config()
109 data_segment_config.segment = FCAN_DATA_SEGMENT; in _can_config()
119 arb_segment_config.segment = FCAN_ARB_SEGMENT; in _can_config()
128 data_segment_config.segment = FCAN_DATA_SEGMENT; in _can_config()
250 arb_segment_config.segment = FCAN_ARB_SEGMENT; in _can_control()
259 data_segment_config.segment = FCAN_DATA_SEGMENT; in _can_control()
283 arb_segment_config.segment = FCAN_ARB_SEGMENT; in _can_control()
292 data_segment_config.segment = FCAN_DATA_SEGMENT; in _can_control()
/bsp/maxim/libraries/MAX32660PeriphDriver/CMSIS/Device/Maxim/MAX32660/Source/IAR/
A Dcmain.s40 ; instruction set and to be reachable by BL from the ICODE segment
41 ; (it is safest to link them in segment ICODE).
/bsp/taihu/
A Dtaihu.lds12 /* Read-only sections, merged into text segment: */
65 /* Read-write section, merged into data segment: */
/bsp/simulator/
A Dgcc_elf64.ld8 /* Read-only sections, merged into text segment: */
9 …ROVIDE (__executable_start = SEGMENT_START("text-segment", 0x08048000)); . = SEGMENT_START("text-s…
102 /* Adjust the address for the data segment. We want to adjust up to
A Dgcc.ld9 /* Read-only sections, merged into text segment: */
10 …ROVIDE (__executable_start = SEGMENT_START("text-segment", 0x08048000)); . = SEGMENT_START("text-s…
97 /* Adjust the address for the data segment. We want to adjust up to
/bsp/bouffalo_lab/bl60x/
A Dflash_prog_cfg.ini4 # skip mode set first para is skip addr, second para is skip len, multi-segment region with ; separ…
/bsp/bouffalo_lab/bl61x/
A Dflash_prog_cfg.ini4 # skip mode set first para is skip addr, second para is skip len, multi-segment region with ; separ…
/bsp/bouffalo_lab/bl808/m0/
A Dflash_prog_cfg.ini4 # skip mode set first para is skip addr, second para is skip len, multi-segment region with ; separ…
/bsp/bouffalo_lab/bl70x/
A Dflash_prog_cfg.ini4 # skip mode set first para is skip addr, second para is skip len, multi-segment region with ; separ…
/bsp/bouffalo_lab/bl808/d0/
A Dflash_prog_cfg.ini4 # skip mode set first para is skip addr, second para is skip len, multi-segment region with ; separ…
/bsp/bouffalo_lab/bl808/lp/
A Dflash_prog_cfg.ini4 # skip mode set first para is skip addr, second para is skip len, multi-segment region with ; separ…
/bsp/Infineon/psoc6-cy8ckit-062S2-43012/libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM0P/TOOLCHAIN_A_Clang/
A Dstartup_psoc6_02_cm0plus.S134 ldr r0, =segment$start$__DATA
135 ldr r1, =segment$end$__TEXT
/bsp/Infineon/libraries/templates/PSOC62/libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM0P/TOOLCHAIN_A_Clang/
A Dstartup_psoc6_02_cm0plus.S134 ldr r0, =segment$start$__DATA
135 ldr r1, =segment$end$__TEXT
/bsp/Infineon/psoc6-cy8ckit-062s4/libs/TARGET_CY8CKIT-062S4/COMPONENT_CM0P/TOOLCHAIN_A_Clang/
A Dstartup_psoc6_04_cm0plus.S134 ldr r0, =segment$start$__DATA
135 ldr r1, =segment$end$__TEXT
/bsp/Infineon/psoc6-cy8cproto-062S3-4343W/libs/TARGET_CY8CPROTO-062S3-4343W/COMPONENT_CM0P/TOOLCHAIN_A_Clang/
A Dstartup_psoc6_03_cm0plus.S134 ldr r0, =segment$start$__DATA
135 ldr r1, =segment$end$__TEXT
/bsp/Infineon/psoc6-evaluationkit-062S2/libs/TARGET_RTT-062S2/COMPONENT_CM0P/TOOLCHAIN_A_Clang/
A Dstartup_psoc6_02_cm0plus.S134 ldr r0, =segment$start$__DATA
135 ldr r1, =segment$end$__TEXT
/bsp/bouffalo_lab/bl808/
A Dflash_prog_cfg.ini4 # skip mode set first para is skip addr, second para is skip len, multi-segment region with ; separ…
/bsp/Infineon/psoc6-cy8ckit-062-BLE/libs/TARGET_CY8CKIT-062-BLE/COMPONENT_CM0P/TOOLCHAIN_A_Clang/
A Dstartup_psoc6_01_cm0plus.S150 ldr r0, =segment$start$__DATA
151 ldr r1, =segment$end$__TEXT
/bsp/Infineon/psoc6-cy8ckit-062-WIFI-BT/libs/TARGET_CY8CKIT-062-WIFI-BT/COMPONENT_CM0P/TOOLCHAIN_A_Clang/
A Dstartup_psoc6_01_cm0plus.S150 ldr r0, =segment$start$__DATA
151 ldr r1, =segment$end$__TEXT
/bsp/efm32/Libraries/emlib/inc/
A Dem_lcd.h285 void LCD_SegmentRangeEnable(LCD_SegmentRange_TypeDef segment, bool enable);
295 void LCD_BiasSegmentSet(int segment, int biasLevel);
/bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Source/IAR/
A Dstartup_efm32g.c34 #pragma segment="CSTACK"
/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Source/IAR/
A Dstartup_efm32gg.c34 #pragma segment="CSTACK"

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