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Searched refs:set_rate (Results 1 – 14 of 14) sorted by relevance

/bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi-ng/
A Dclk-fixed-factor.c68 .set_rate = clk_factor_set_rate,
A Dccu_mp.c290 .set_rate = ccu_mp_set_rate,
377 .set_rate = ccu_mp_mmc_set_rate,
A Dccu_gate.c138 .set_rate = ccu_gate_set_rate,
A Dccu_div.c148 .set_rate = ccu_div_set_rate,
A Dccu_mult.c187 .set_rate = ccu_mult_set_rate,
A Dccu_nk.c175 .set_rate = ccu_nk_set_rate,
A Dccu.c873 if (core->ops->set_rate) in clk_core_set_rate()
875 ret = core->ops->set_rate(core->hw, rate, p_core->rate); in clk_core_set_rate()
A Dccu_nkm.c226 .set_rate = ccu_nkm_set_rate,
A Dccu_nkmp.c273 .set_rate = ccu_nkmp_set_rate,
A Dccu_nm.c280 .set_rate = ccu_nm_set_rate,
A Dccu.h316 int (*set_rate)(struct clk_hw *hw, unsigned long rate, member
A Dclk-divider.c577 .set_rate = clk_divider_set_rate,
/bsp/rockchip/rk3500/driver/clk/
A Dclk-rk3588.c2710 rk_clk_set_default_rates(clk, clk->clk_np->ops->set_rate, clk_id); in rk3588_clk_init()
3117 .set_rate = rk3588_clk_set_rate,
A Dclk-rk3568.c4400 rk_clk_set_default_rates(clk, clk->clk_np->ops->set_rate, clk_id); in rk3568_clk_init()
4617 .set_rate = rk3568_clk_set_rate,

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