| /bsp/synwit/libraries/SWM341_CSL/CMSIS/CoreSupport/ |
| A D | cachel1_armv7.h | 145 uint32_t sets; in SCB_EnableDCache() local
156 sets = (uint32_t)(CCSIDR_SETS(ccsidr)); in SCB_EnableDCache()
166 } while(sets-- != 0U); in SCB_EnableDCache()
185 uint32_t sets; in SCB_DisableDCache() local
207 } while(sets-- != 0U); in SCB_DisableDCache()
223 uint32_t sets; in SCB_InvalidateDCache() local
242 } while(sets-- != 0U); in SCB_InvalidateDCache()
258 uint32_t sets; in SCB_CleanDCache() local
277 } while(sets-- != 0U); in SCB_CleanDCache()
293 uint32_t sets; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/airm2m/air32f103/libraries/CMSIS/Include/ |
| A D | cachel1_armv7.h | 145 uint32_t sets; in SCB_EnableDCache() local
156 sets = (uint32_t)(CCSIDR_SETS(ccsidr)); in SCB_EnableDCache()
166 } while(sets-- != 0U); in SCB_EnableDCache()
185 uint32_t sets; in SCB_DisableDCache() local
207 } while(sets-- != 0U); in SCB_DisableDCache()
223 uint32_t sets; in SCB_InvalidateDCache() local
242 } while(sets-- != 0U); in SCB_InvalidateDCache()
258 uint32_t sets; in SCB_CleanDCache() local
277 } while(sets-- != 0U); in SCB_CleanDCache()
293 uint32_t sets; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/rockchip/common/rk_hal/lib/CMSIS/Core/Include/ |
| A D | cachel1_armv7.h | 145 uint32_t sets; in SCB_EnableDCache() local
156 sets = (uint32_t)(CCSIDR_SETS(ccsidr)); in SCB_EnableDCache()
166 } while(sets-- != 0U); in SCB_EnableDCache()
185 uint32_t sets; in SCB_DisableDCache() local
207 } while(sets-- != 0U); in SCB_DisableDCache()
223 uint32_t sets; in SCB_InvalidateDCache() local
242 } while(sets-- != 0U); in SCB_InvalidateDCache()
258 uint32_t sets; in SCB_CleanDCache() local
277 } while(sets-- != 0U); in SCB_CleanDCache()
293 uint32_t sets; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/tae32f5300/Libraries/CMSIS/Include/ |
| A D | cachel1_armv7.h | 145 uint32_t sets; in SCB_EnableDCache() local
156 sets = (uint32_t)(CCSIDR_SETS(ccsidr)); in SCB_EnableDCache()
166 } while(sets-- != 0U); in SCB_EnableDCache()
185 uint32_t sets; in SCB_DisableDCache() local
207 } while(sets-- != 0U); in SCB_DisableDCache()
223 uint32_t sets; in SCB_InvalidateDCache() local
242 } while(sets-- != 0U); in SCB_InvalidateDCache()
258 uint32_t sets; in SCB_CleanDCache() local
277 } while(sets-- != 0U); in SCB_CleanDCache()
293 uint32_t sets; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/renesas/ra8m1-ek/ra/arm/CMSIS_5/CMSIS/Core/Include/ |
| A D | cachel1_armv7.h | 145 uint32_t sets; in SCB_EnableDCache() local
156 sets = (uint32_t)(CCSIDR_SETS(ccsidr)); in SCB_EnableDCache()
166 } while(sets-- != 0U); in SCB_EnableDCache()
185 uint32_t sets; in SCB_DisableDCache() local
207 } while(sets-- != 0U); in SCB_DisableDCache()
223 uint32_t sets; in SCB_InvalidateDCache() local
242 } while(sets-- != 0U); in SCB_InvalidateDCache()
258 uint32_t sets; in SCB_CleanDCache() local
277 } while(sets-- != 0U); in SCB_CleanDCache()
293 uint32_t sets; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/renesas/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/ |
| A D | cachel1_armv7.h | 145 uint32_t sets; in SCB_EnableDCache() local
156 sets = (uint32_t)(CCSIDR_SETS(ccsidr)); in SCB_EnableDCache()
166 } while(sets-- != 0U); in SCB_EnableDCache()
185 uint32_t sets; in SCB_DisableDCache() local
207 } while(sets-- != 0U); in SCB_DisableDCache()
223 uint32_t sets; in SCB_InvalidateDCache() local
242 } while(sets-- != 0U); in SCB_InvalidateDCache()
258 uint32_t sets; in SCB_CleanDCache() local
277 } while(sets-- != 0U); in SCB_CleanDCache()
293 uint32_t sets; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/ht32/libraries/HT32_STD_5xxxx_FWLib/library/CMSIS/Core/Include/ |
| A D | cachel1_armv7.h | 145 uint32_t sets; in SCB_EnableDCache() local
156 sets = (uint32_t)(CCSIDR_SETS(ccsidr)); in SCB_EnableDCache()
166 } while(sets-- != 0U); in SCB_EnableDCache()
185 uint32_t sets; in SCB_DisableDCache() local
207 } while(sets-- != 0U); in SCB_DisableDCache()
223 uint32_t sets; in SCB_InvalidateDCache() local
242 } while(sets-- != 0U); in SCB_InvalidateDCache()
258 uint32_t sets; in SCB_CleanDCache() local
277 } while(sets-- != 0U); in SCB_CleanDCache()
293 uint32_t sets; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/renesas/ra8d1-vision-board/ra/arm/CMSIS_5/CMSIS/Core/Include/ |
| A D | cachel1_armv7.h | 145 uint32_t sets; in SCB_EnableDCache() local
156 sets = (uint32_t)(CCSIDR_SETS(ccsidr)); in SCB_EnableDCache()
166 } while(sets-- != 0U); in SCB_EnableDCache()
185 uint32_t sets; in SCB_DisableDCache() local
207 } while(sets-- != 0U); in SCB_DisableDCache()
223 uint32_t sets; in SCB_InvalidateDCache() local
242 } while(sets-- != 0U); in SCB_InvalidateDCache()
258 uint32_t sets; in SCB_CleanDCache() local
277 } while(sets-- != 0U); in SCB_CleanDCache()
293 uint32_t sets; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/renesas/ra6m4-iot/ra/arm/CMSIS_5/CMSIS/Core/Include/ |
| A D | cachel1_armv7.h | 145 uint32_t sets; in SCB_EnableDCache() local
156 sets = (uint32_t)(CCSIDR_SETS(ccsidr)); in SCB_EnableDCache()
166 } while(sets-- != 0U); in SCB_EnableDCache()
185 uint32_t sets; in SCB_DisableDCache() local
207 } while(sets-- != 0U); in SCB_DisableDCache()
223 uint32_t sets; in SCB_InvalidateDCache() local
242 } while(sets-- != 0U); in SCB_InvalidateDCache()
258 uint32_t sets; in SCB_CleanDCache() local
277 } while(sets-- != 0U); in SCB_CleanDCache()
293 uint32_t sets; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/renesas/ra6m3-hmi-board/ra/arm/CMSIS_5/CMSIS/Core/Include/ |
| A D | cachel1_armv7.h | 145 uint32_t sets; in SCB_EnableDCache() local
156 sets = (uint32_t)(CCSIDR_SETS(ccsidr)); in SCB_EnableDCache()
166 } while(sets-- != 0U); in SCB_EnableDCache()
185 uint32_t sets; in SCB_DisableDCache() local
207 } while(sets-- != 0U); in SCB_DisableDCache()
223 uint32_t sets; in SCB_InvalidateDCache() local
242 } while(sets-- != 0U); in SCB_InvalidateDCache()
258 uint32_t sets; in SCB_CleanDCache() local
277 } while(sets-- != 0U); in SCB_CleanDCache()
293 uint32_t sets; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/renesas/ra4m2-eco/ra/arm/CMSIS_5/CMSIS/Core/Include/ |
| A D | cachel1_armv7.h | 145 uint32_t sets; in SCB_EnableDCache() local
156 sets = (uint32_t)(CCSIDR_SETS(ccsidr)); in SCB_EnableDCache()
166 } while(sets-- != 0U); in SCB_EnableDCache()
185 uint32_t sets; in SCB_DisableDCache() local
207 } while(sets-- != 0U); in SCB_DisableDCache()
223 uint32_t sets; in SCB_InvalidateDCache() local
242 } while(sets-- != 0U); in SCB_InvalidateDCache()
258 uint32_t sets; in SCB_CleanDCache() local
277 } while(sets-- != 0U); in SCB_CleanDCache()
293 uint32_t sets; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/renesas/ebf_qi_min_6m5/ra/arm/CMSIS_5/CMSIS/Core/Include/ |
| A D | cachel1_armv7.h | 145 uint32_t sets; in SCB_EnableDCache() local
156 sets = (uint32_t)(CCSIDR_SETS(ccsidr)); in SCB_EnableDCache()
166 } while(sets-- != 0U); in SCB_EnableDCache()
185 uint32_t sets; in SCB_DisableDCache() local
207 } while(sets-- != 0U); in SCB_DisableDCache()
223 uint32_t sets; in SCB_InvalidateDCache() local
242 } while(sets-- != 0U); in SCB_InvalidateDCache()
258 uint32_t sets; in SCB_CleanDCache() local
277 } while(sets-- != 0U); in SCB_CleanDCache()
293 uint32_t sets; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/renesas/ra2l1-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/ |
| A D | cachel1_armv7.h | 145 uint32_t sets; in SCB_EnableDCache() local
156 sets = (uint32_t)(CCSIDR_SETS(ccsidr)); in SCB_EnableDCache()
166 } while(sets-- != 0U); in SCB_EnableDCache()
185 uint32_t sets; in SCB_DisableDCache() local
207 } while(sets-- != 0U); in SCB_DisableDCache()
223 uint32_t sets; in SCB_InvalidateDCache() local
242 } while(sets-- != 0U); in SCB_InvalidateDCache()
258 uint32_t sets; in SCB_CleanDCache() local
277 } while(sets-- != 0U); in SCB_CleanDCache()
293 uint32_t sets; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/renesas/ra6m3-ek/ra/arm/CMSIS_5/CMSIS/Core/Include/ |
| A D | cachel1_armv7.h | 145 uint32_t sets; in SCB_EnableDCache() local
156 sets = (uint32_t)(CCSIDR_SETS(ccsidr)); in SCB_EnableDCache()
166 } while(sets-- != 0U); in SCB_EnableDCache()
185 uint32_t sets; in SCB_DisableDCache() local
207 } while(sets-- != 0U); in SCB_DisableDCache()
223 uint32_t sets; in SCB_InvalidateDCache() local
242 } while(sets-- != 0U); in SCB_InvalidateDCache()
258 uint32_t sets; in SCB_CleanDCache() local
277 } while(sets-- != 0U); in SCB_CleanDCache()
293 uint32_t sets; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/renesas/ra8d1-ek/ra/arm/CMSIS_5/CMSIS/Core/Include/ |
| A D | cachel1_armv7.h | 145 uint32_t sets; in SCB_EnableDCache() local
156 sets = (uint32_t)(CCSIDR_SETS(ccsidr)); in SCB_EnableDCache()
166 } while(sets-- != 0U); in SCB_EnableDCache()
185 uint32_t sets; in SCB_DisableDCache() local
207 } while(sets-- != 0U); in SCB_DisableDCache()
223 uint32_t sets; in SCB_InvalidateDCache() local
242 } while(sets-- != 0U); in SCB_InvalidateDCache()
258 uint32_t sets; in SCB_CleanDCache() local
277 } while(sets-- != 0U); in SCB_CleanDCache()
293 uint32_t sets; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/ht32/libraries/HT32_STD_1xxxx_FWLib/library/CMSIS/Core/Include/ |
| A D | cachel1_armv7.h | 145 uint32_t sets; in SCB_EnableDCache() local
156 sets = (uint32_t)(CCSIDR_SETS(ccsidr)); in SCB_EnableDCache()
166 } while(sets-- != 0U); in SCB_EnableDCache()
185 uint32_t sets; in SCB_DisableDCache() local
207 } while(sets-- != 0U); in SCB_DisableDCache()
223 uint32_t sets; in SCB_InvalidateDCache() local
242 } while(sets-- != 0U); in SCB_InvalidateDCache()
258 uint32_t sets; in SCB_CleanDCache() local
277 } while(sets-- != 0U); in SCB_CleanDCache()
293 uint32_t sets; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/renesas/ra6e2-fpb/ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/ |
| A D | armv7m_cachel1.h | 143 uint32_t sets; in SCB_EnableDCache() local
154 sets = (uint32_t)(CCSIDR_SETS(ccsidr)); in SCB_EnableDCache()
164 } while(sets-- != 0U); in SCB_EnableDCache()
184 uint32_t sets; in SCB_DisableDCache() member
235 } while(locals.sets-- != 0U); in SCB_DisableDCache()
251 uint32_t sets; in SCB_InvalidateDCache() local
270 } while(sets-- != 0U); in SCB_InvalidateDCache()
286 uint32_t sets; in SCB_CleanDCache() local
305 } while(sets-- != 0U); in SCB_CleanDCache()
321 uint32_t sets; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/renesas/ra4e2-eco/ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/ |
| A D | armv7m_cachel1.h | 144 uint32_t sets; in SCB_EnableDCache() local
155 sets = (uint32_t)(CCSIDR_SETS(ccsidr)); in SCB_EnableDCache()
165 } while(sets-- != 0U); in SCB_EnableDCache()
185 uint32_t sets; in SCB_DisableDCache() member
236 } while(locals.sets-- != 0U); in SCB_DisableDCache()
252 uint32_t sets; in SCB_InvalidateDCache() local
271 } while(sets-- != 0U); in SCB_InvalidateDCache()
287 uint32_t sets; in SCB_CleanDCache() local
306 } while(sets-- != 0U); in SCB_CleanDCache()
322 uint32_t sets; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/at32/libraries/CMSIS/include/ |
| A D | cachel1_armv7.h | 145 uint32_t sets; in SCB_EnableDCache() local
156 sets = (uint32_t)(CCSIDR_SETS(ccsidr)); in SCB_EnableDCache()
166 } while(sets-- != 0U); in SCB_EnableDCache()
186 uint32_t sets; in SCB_DisableDCache() member
237 } while(locals.sets-- != 0U); in SCB_DisableDCache()
253 uint32_t sets; in SCB_InvalidateDCache() local
272 } while(sets-- != 0U); in SCB_InvalidateDCache()
288 uint32_t sets; in SCB_CleanDCache() local
307 } while(sets-- != 0U); in SCB_CleanDCache()
323 uint32_t sets; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/synwit/libraries/SWM320_CSL/CMSIS/CoreSupport/ |
| A D | core_cm7.h | 1937 uint32_t sets, ways; in SCB_EnableDCache() local
1940 sets = CCSIDR_SETS(ccsidr); in SCB_EnableDCache()
1953 } while(sets--); in SCB_EnableDCache()
1972 uint32_t sets, ways; in SCB_DisableDCache() local
1990 } while(sets--); in SCB_DisableDCache()
2007 uint32_t sets, ways; in SCB_InvalidateDCache() local
2023 } while(sets--); in SCB_InvalidateDCache()
2039 uint32_t sets, ways; in SCB_CleanDCache() local
2055 } while(sets--); in SCB_CleanDCache()
2071 uint32_t sets, ways; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/samd21/sam_d2x_asflib/CMSIS/Include/ |
| A D | core_cm7.h | 1937 uint32_t sets, ways; in SCB_EnableDCache() local
1940 sets = CCSIDR_SETS(ccsidr); in SCB_EnableDCache()
1953 } while(sets--); in SCB_EnableDCache()
1972 uint32_t sets, ways; in SCB_DisableDCache() local
1990 } while(sets--); in SCB_DisableDCache()
2007 uint32_t sets, ways; in SCB_InvalidateDCache() local
2023 } while(sets--); in SCB_InvalidateDCache()
2039 uint32_t sets, ways; in SCB_CleanDCache() local
2055 } while(sets--); in SCB_CleanDCache()
2071 uint32_t sets, ways; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/mm32l3xx/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm7.h | 1937 uint32_t sets, ways; in SCB_EnableDCache() local
1940 sets = CCSIDR_SETS(ccsidr); in SCB_EnableDCache()
1953 } while(sets--); in SCB_EnableDCache()
1972 uint32_t sets, ways; in SCB_DisableDCache() local
1990 } while(sets--); in SCB_DisableDCache()
2007 uint32_t sets, ways; in SCB_InvalidateDCache() local
2023 } while(sets--); in SCB_InvalidateDCache()
2039 uint32_t sets, ways; in SCB_CleanDCache() local
2055 } while(sets--); in SCB_CleanDCache()
2071 uint32_t sets, ways; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm7.h | 1937 uint32_t sets, ways; in SCB_EnableDCache() local
1940 sets = CCSIDR_SETS(ccsidr); in SCB_EnableDCache()
1953 } while(sets--); in SCB_EnableDCache()
1972 uint32_t sets, ways; in SCB_DisableDCache() local
1990 } while(sets--); in SCB_DisableDCache()
2007 uint32_t sets, ways; in SCB_InvalidateDCache() local
2023 } while(sets--); in SCB_InvalidateDCache()
2039 uint32_t sets, ways; in SCB_CleanDCache() local
2055 } while(sets--); in SCB_CleanDCache()
2071 uint32_t sets, ways; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/mm32f103x/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm7.h | 1922 uint32_t sets, ways; in SCB_EnableDCache() local
1925 sets = CCSIDR_SETS(ccsidr); in SCB_EnableDCache()
1938 } while(sets--); in SCB_EnableDCache()
1957 uint32_t sets, ways; in SCB_DisableDCache() local
1975 } while(sets--); in SCB_DisableDCache()
1992 uint32_t sets, ways; in SCB_InvalidateDCache() local
2008 } while(sets--); in SCB_InvalidateDCache()
2024 uint32_t sets, ways; in SCB_CleanDCache() local
2040 } while(sets--); in SCB_CleanDCache()
2056 uint32_t sets, ways; in SCB_CleanInvalidateDCache() local
[all …]
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| /bsp/msp432e401y-LaunchPad/libraries/Drivers/CMSIS/Include/ |
| A D | core_cm7.h | 2295 uint32_t sets; in SCB_EnableDCache() local
2306 sets = (uint32_t)(CCSIDR_SETS(ccsidr)); in SCB_EnableDCache()
2320 while (sets-- != 0U); in SCB_EnableDCache()
2339 uint32_t sets; in SCB_DisableDCache() local
2365 while (sets-- != 0U); in SCB_DisableDCache()
2381 uint32_t sets; in SCB_InvalidateDCache() local
2404 while (sets-- != 0U); in SCB_InvalidateDCache()
2420 uint32_t sets; in SCB_CleanDCache() local
2443 while (sets-- != 0U); in SCB_CleanDCache()
2459 uint32_t sets; in SCB_CleanInvalidateDCache() local
[all …]
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