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Searched refs:signal (Results 1 – 25 of 57) sorted by relevance

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/bsp/hpmicro/libraries/hpm_sdk/drivers/src/
A Dhpm_pla_drv.c32 cfg->input[i].signal = i; in pla_get_aoi_16to8_one_channel()
82 cfg->input[i].signal = i; in pla_get_aoi_8to7_one_channel()
88 cfg->input[i].signal = i; in pla_get_aoi_8to7_one_channel()
94 cfg->input[i].signal = i; in pla_get_aoi_8to7_one_channel()
171 cfg->signal = signal; in pla_get_aoi_8to7_input_signal()
175 cfg->signal = signal; in pla_get_aoi_8to7_input_signal()
179 cfg->signal = signal; in pla_get_aoi_8to7_input_signal()
183 cfg->signal = signal; in pla_get_aoi_8to7_input_signal()
187 cfg->signal = signal; in pla_get_aoi_8to7_input_signal()
191 cfg->signal = signal; in pla_get_aoi_8to7_input_signal()
[all …]
A Dhpm_uart_drv.c285 void uart_set_signal_level(UART_Type *ptr, uart_signal_t signal, uart_signal_level_t level) in uart_set_signal_level() argument
288 ptr->MCR = (ptr->MCR | signal); in uart_set_signal_level()
290 ptr->MCR = (ptr->MCR & ~signal); in uart_set_signal_level()
/bsp/efm32/Libraries/emlib/src/
A Dem_prs.c71 uint32_t signal, in PRS_SourceSignalSet() argument
77 (signal & _PRS_CH_CTRL_SIGSEL_MASK) | in PRS_SourceSignalSet()
114 uint32_t signal) in PRS_SourceAsyncSignalSet() argument
120 (signal & _PRS_CH_CTRL_SIGSEL_MASK) | in PRS_SourceAsyncSignalSet()
/bsp/nxp/imx/imxrt/libraries/drivers/vglite/VGLite/rtos/
A Dvg_lite_os.h8 #define vg_lite_os_set_event_state(event, state) (event)->signal = state
10 #define vg_lite_os_event_state(event) (event)->signal
15 (event)->signal = state; \
21 int32_t signal; /*! The command buffer status */ member
A Dvg_lite_os.c108 peek_queue->event->signal = VG_LITE_HW_FINISHED; in command_queue()
140 peek_queue->event->signal = VG_LITE_IDLE; in command_queue()
325 event->signal = VG_LITE_IN_QUEUE; in vg_lite_os_submit()
344 if(event->signal == VG_LITE_HW_FINISHED){ in vg_lite_os_wait()
429 event->signal = state; in vg_lite_os_init_event()
/bsp/hpmicro/libraries/hpm_sdk/drivers/inc/
A Dhpm_pla_drv.h109 pla_aoi_16to8_input_signal_type_t signal; member
158 pla_aoi_8to7_input_signal_type_t signal; member
310 ~(((uint32_t)cfg->op) << (cfg->signal << 1)); in pla_set_aoi_16to8_input_signal()
325 pla_aoi_16to8_input_signal_type_t signal, in pla_get_aoi_16to8_input_signal() argument
328 cfg->op = (pla->CHN[chn].AOI_16TO8[aoi_16to8_chn] >> (signal << 1)) & 0x03; in pla_get_aoi_16to8_input_signal()
329 cfg->signal = signal; in pla_get_aoi_16to8_input_signal()
376 pla_aoi_8to7_input_signal_type_t signal,
A Dhpm_uart_drv.h655 uart_signal_t signal,
/bsp/nuvoton/libraries/n9h30/rtt_port/
A Ddrv_i2c.c67 struct rt_completion signal; member
211 rt_completion_done(&psNuI2CDev->signal); in nu_i2c_isr()
219 rt_completion_done(&psNuI2CDev->signal); in nu_i2c_isr()
255 rt_completion_done(&psNuI2CDev->signal); in nu_i2c_isr()
280 rt_completion_done(&psNuI2CDev->signal); in nu_i2c_isr()
330 rt_completion_init(&psNuI2cDev->signal); in nu_i2c_read()
334 if ((RT_EOK == rt_completion_wait(&psNuI2cDev->signal, I2C_SIGNAL_TIMEOUT))) in nu_i2c_read()
398 rt_completion_init(&psNuI2cDev->signal); in nu_i2c_write()
402 if ((RT_EOK == rt_completion_wait(&psNuI2cDev->signal, I2C_SIGNAL_TIMEOUT))) in nu_i2c_write()
A Ddrv_ge2d.c602 struct rt_completion signal; member
627 rt_completion_init(&(g_sNuGe2d.signal)); \
634 rt_completion_wait(&g_sNuGe2d.signal, 60); \
639 rt_completion_done(&g_sNuGe2d.signal); \
3470 rt_completion_init(&(g_sNuGe2d.signal)); in rt_hw_ge2d_init()
/bsp/synwit/libraries/SWM341_CSL/SWM341_StdPeriph_Driver/
A DSWM341_iofilt.c37 void IOFILT_Init(uint32_t IOFILTn, uint32_t signal, uint32_t width) in IOFILT_Init() argument
44 *(&SYS->IOFILT0 + IOFILTn) = (signal << SYS_IOFILT_IOSEL_Pos) | in IOFILT_Init()
A DSWM341_iofilt.h35 void IOFILT_Init(uint32_t IOFILTn, uint32_t signal, uint32_t width);
/bsp/efm32/Libraries/emlib/inc/
A Dem_prs.h112 uint32_t signal,
118 uint32_t signal);
/bsp/microchip/samc21/bsp/hal/documentation/
A Dadc_sync.rst6 A reference signal with a known voltage level is quantified into equally
38 input signal and never less than the expected maximum input voltage.
57 * Sampling and measurement of a signal. E.g., sinusoidal wave, square wave.
/bsp/microchip/saml10/bsp/hal/documentation/
A Dadc_sync.rst6 A reference signal with a known voltage level is quantified into equally
38 input signal and never less than the expected maximum input voltage.
57 * Sampling and measurement of a signal. E.g., sinusoidal wave, square wave.
/bsp/microchip/same70/bsp/hal/documentation/
A Dadc_sync.rst6 A reference signal with a known voltage level is quantified into equally
38 input signal and never less than the expected maximum input voltage.
57 * Sampling and measurement of a signal. E.g., sinusoidal wave, square wave.
/bsp/microchip/same54/bsp/hal/documentation/
A Dadc_sync.rst6 A reference signal with a known voltage level is quantified into equally
38 input signal and never less than the expected maximum input voltage.
57 * Sampling and measurement of a signal. E.g., sinusoidal wave, square wave.
/bsp/efm32/Libraries/CMSIS/RTOS/
A Dcmsis_os.h428 int32_t osSignalSet (osThreadId thread_id, int32_t signal);
435 int32_t osSignalClear (osThreadId thread_id, int32_t signal);
/bsp/rm48x50/HALCoGen/include/
A Dhet.h340 void pwmSetSignal(hetRAMBASE_t * hetRAM,uint32 pwm, hetSIGNAL_t signal);
/bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/
A Dald_ebi.c72 assert_param(IS_EBI_WAITE_SIGNAL(init->signal)); in ald_ebi_nor_sram_init()
91 | (uint32_t)init->signal in ald_ebi_nor_sram_init()
106 | (uint32_t)init->signal in ald_ebi_nor_sram_init()
/bsp/nxp/lpc/lpc55sxx/lpc55s69_nxp_evk/
A DREADME.md94 **MDK and IAR must manually select the chip signal once in the project after the project is built, …
/bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Include/
A Dald_ebi.h424 ebi_wait_signal_t signal; /**< Enables or disables the wait state insertion, only in burst mode */ member
/bsp/stm32/stm32g431-st-nucleo/
A DREADME.md9 …ns and all the data types. It also implements a full set of DSP (digital signal processing) instru…
/bsp/stm32/stm32g491-st-nucleo/
A DREADME.md9 …ns and all the data types. It also implements a full set of DSP (digital signal processing) instru…
/bsp/microchip/saml10/
A DREADME.md93 - Hardware noise filtering and noise signal desynchronization for high conducted immunity
A DREADME_zh.md93 - Hardware noise filtering and noise signal desynchronization for high conducted immunity

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