1 /** @file reg_spi.h 2 * @brief SPI Register Layer Header File 3 * @date 29.May.2013 4 * @version 03.05.02 5 * 6 * This file contains: 7 * - Definitions 8 * - Types 9 * - Interface Prototypes 10 * . 11 * which are relevant for the SPI driver. 12 */ 13 14 /* (c) Texas Instruments 2009-2013, All rights reserved. */ 15 16 #ifndef __REG_SPI_H__ 17 #define __REG_SPI_H__ 18 19 #include "sys_common.h" 20 #include "gio.h" 21 22 23 24 /* USER CODE BEGIN (0) */ 25 /* USER CODE END */ 26 27 /* Spi Register Frame Definition */ 28 /** @struct spiBase 29 * @brief SPI Register Definition 30 * 31 * This structure is used to access the SPI module registers. 32 */ 33 /** @typedef spiBASE_t 34 * @brief SPI Register Frame Type Definition 35 * 36 * This type is used to access the SPI Registers. 37 */ 38 typedef volatile struct spiBase 39 { 40 uint32 GCR0; /**< 0x0000: Global Control 0 */ 41 uint32 GCR1; /**< 0x0004: Global Control 1 */ 42 uint32 INT0; /**< 0x0008: Interrupt Register */ 43 uint32 LVL; /**< 0x000C: Interrupt Level */ 44 uint32 FLG; /**< 0x0010: Interrupt flags */ 45 uint32 PCFUN; /**< 0x0014: Function Pin Enable */ 46 uint32 PCDIR; /**< 0x0018: Pin Direction */ 47 uint32 PCDIN; /**< 0x001C: Pin Input Latch */ 48 uint32 PCDOUT; /**< 0x0020: Pin Output Latch */ 49 uint32 PCSET; /**< 0x0024: Output Pin Set */ 50 uint32 PCCLR; /**< 0x0028: Output Pin Clr */ 51 uint32 PCPDR; /**< 0x002C: Open Drain Output Enable */ 52 uint32 PCDIS; /**< 0x0030: Pullup/Pulldown Disable */ 53 uint32 PCPSL; /**< 0x0034: Pullup/Pulldown Selection */ 54 uint32 DAT0; /**< 0x0038: Transmit Data */ 55 uint32 DAT1; /**< 0x003C: Transmit Data with Format and Chip Select */ 56 uint32 BUF; /**< 0x0040: Receive Buffer */ 57 uint32 EMU; /**< 0x0044: Emulation Receive Buffer */ 58 uint32 DELAY; /**< 0x0048: Delays */ 59 uint32 CSDEF; /**< 0x004C: Default Chip Select */ 60 uint32 FMT0; /**< 0x0050: Data Format 0 */ 61 uint32 FMT1; /**< 0x0054: Data Format 1 */ 62 uint32 FMT2; /**< 0x0058: Data Format 2 */ 63 uint32 FMT3; /**< 0x005C: Data Format 3 */ 64 uint32 INTVECT0; /**< 0x0060: Interrupt Vector 0 */ 65 uint32 INTVECT1; /**< 0x0064: Interrupt Vector 1 */ 66 uint32 SRSEL; /**< 0x0068: Slew Rate Select */ 67 uint32 RESERVED[50U]; /**< 0x006C to 0x0130: Reserved */ 68 uint32 IOLPKTSTCR; /**< 0x0134: IO loopback */ 69 } spiBASE_t; 70 71 /** @def spiREG1 72 * @brief SPI1 (MIBSPI - Compatibility Mode) Register Frame Pointer 73 * 74 * This pointer is used by the SPI driver to access the spi module registers. 75 */ 76 #define spiREG1 ((spiBASE_t *)0xFFF7F400U) 77 78 79 /** @def spiPORT1 80 * @brief SPI1 (MIBSPI - Compatibility Mode) GIO Port Register Pointer 81 * 82 * Pointer used by the GIO driver to access I/O PORT of SPI1 83 * (use the GIO drivers to access the port pins). 84 */ 85 #define spiPORT1 ((gioPORT_t *)0xFFF7F418U) 86 87 /** @def spiREG2 88 * @brief SPI2 Register Frame Pointer 89 * 90 * This pointer is used by the SPI driver to access the spi module registers. 91 */ 92 #define spiREG2 ((spiBASE_t *)0xFFF7F600U) 93 94 95 /** @def spiPORT2 96 * @brief SPI2 GIO Port Register Pointer 97 * 98 * Pointer used by the GIO driver to access I/O PORT of SPI2 99 * (use the GIO drivers to access the port pins). 100 */ 101 #define spiPORT2 ((gioPORT_t *)0xFFF7F618U) 102 103 /** @def spiREG3 104 * @brief SPI3 (MIBSPI - Compatibility Mode) Register Frame Pointer 105 * 106 * This pointer is used by the SPI driver to access the spi module registers. 107 */ 108 #define spiREG3 ((spiBASE_t *)0xFFF7F800U) 109 110 111 /** @def spiPORT3 112 * @brief SPI3 (MIBSPI - Compatibility Mode) GIO Port Register Pointer 113 * 114 * Pointer used by the GIO driver to access I/O PORT of SPI3 115 * (use the GIO drivers to access the port pins). 116 */ 117 #define spiPORT3 ((gioPORT_t *)0xFFF7F818U) 118 119 /** @def spiREG4 120 * @brief SPI4 Register Frame Pointer 121 * 122 * This pointer is used by the SPI driver to access the spi module registers. 123 */ 124 #define spiREG4 ((spiBASE_t *)0xFFF7FA00U) 125 126 127 /** @def spiPORT4 128 * @brief SPI4 GIO Port Register Pointer 129 * 130 * Pointer used by the GIO driver to access I/O PORT of SPI4 131 * (use the GIO drivers to access the port pins). 132 */ 133 #define spiPORT4 ((gioPORT_t *)0xFFF7FA18U) 134 135 /** @def spiREG5 136 * @brief SPI5 (MIBSPI - Compatibility Mode) Register Frame Pointer 137 * 138 * This pointer is used by the SPI driver to access the spi module registers. 139 */ 140 #define spiREG5 ((spiBASE_t *)0xFFF7FC00U) 141 142 143 /** @def spiPORT5 144 * @brief SPI5 (MIBSPI - Compatibility Mode) GIO Port Register Pointer 145 * 146 * Pointer used by the GIO driver to access I/O PORT of SPI5 147 * (use the GIO drivers to access the port pins). 148 */ 149 #define spiPORT5 ((gioPORT_t *)0xFFF7FC18U) 150 151 /* USER CODE BEGIN (1) */ 152 /* USER CODE END */ 153 154 155 #endif 156