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Searched refs:srcClock_Hz (Results 1 – 25 of 31) sorted by relevance

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/bsp/frdm-k64f/device/MK64F12/
A Dfsl_uart.c224 sbr = srcClock_Hz / (config->baudRate_Bps * 16); in UART_Init()
236 uint16_t brfa = (2 * srcClock_Hz / (config->baudRate_Bps)) - 32 * sbr; in UART_Init()
239 tempBaud = (srcClock_Hz * 2 / ((sbr * 32 + brfa))); in UART_Init()
245 baudDiff = (srcClock_Hz / (sbr * 16)) - config->baudRate_Bps; in UART_Init()
250 baudDiff = config->baudRate_Bps - (srcClock_Hz / (16 * (sbr + 1))); in UART_Init()
373 sbr = srcClock_Hz / (baudRate_Bps * 16); in UART_SetBaudRate()
385 uint16_t brfa = (2 * srcClock_Hz / (baudRate_Bps)) - 32 * sbr; in UART_SetBaudRate()
388 tempBaud = (srcClock_Hz * 2 / ((sbr * 32 + brfa))); in UART_SetBaudRate()
392 baudDiff = (srcClock_Hz / (sbr * 16)) - baudRate_Bps; in UART_SetBaudRate()
395 if (baudDiff > (baudRate_Bps - (srcClock_Hz / (16 * (sbr + 1))))) in UART_SetBaudRate()
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A Dfsl_dspi.c161 void DSPI_MasterInit(SPI_Type *base, const dspi_master_config_t *masterConfig, uint32_t srcClock_Hz) in DSPI_MasterInit() argument
186 …I_MasterSetBaudRate(base, masterConfig->whichCtar, masterConfig->ctarConfig.baudRate, srcClock_Hz)) in DSPI_MasterInit()
198 DSPI_MasterSetDelayTimes(base, masterConfig->whichCtar, kDSPI_PcsToSck, srcClock_Hz, in DSPI_MasterInit()
200 DSPI_MasterSetDelayTimes(base, masterConfig->whichCtar, kDSPI_LastSckToPcs, srcClock_Hz, in DSPI_MasterInit()
202 DSPI_MasterSetDelayTimes(base, masterConfig->whichCtar, kDSPI_BetweenTransfer, srcClock_Hz, in DSPI_MasterInit()
315 uint32_t srcClock_Hz) in DSPI_MasterSetBaudRate() argument
344 …realBaudrate = ((srcClock_Hz * dbr) / (s_baudratePrescaler[prescaler] * (s_baudrateScaler[scaler])… in DSPI_MasterSetBaudRate()
405 uint32_t srcClock_Hz, in DSPI_MasterSetDelayTimes() argument
427 …bestDelay = (((1000000000U * 4) / srcClock_Hz) * s_delayPrescaler[bestPrescaler] * s_delayScaler[b… in DSPI_MasterSetDelayTimes()
430 initialDelayNanoSec = 1000000000U / srcClock_Hz * 2; in DSPI_MasterSetDelayTimes()
[all …]
A Dfsl_i2c.h298 void I2C_MasterInit(I2C_Type *base, const i2c_master_config_t *masterConfig, uint32_t srcClock_Hz);
327 void I2C_SlaveInit(I2C_Type *base, const i2c_slave_config_t *slaveConfig, uint32_t srcClock_Hz);
550 void I2C_MasterSetBaudRate(I2C_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz);
A Dfsl_sdhc.c875 uint32_t SDHC_SetSdClock(SDHC_Type *base, uint32_t srcClock_Hz, uint32_t busClock_Hz) in SDHC_SetSdClock() argument
877 assert(srcClock_Hz != 0U); in SDHC_SetSdClock()
878 assert((busClock_Hz != 0U) && (busClock_Hz <= srcClock_Hz)); in SDHC_SetSdClock()
887 totalDiv = srcClock_Hz / busClock_Hz; in SDHC_SetSdClock()
892 if ((srcClock_Hz / totalDiv) > busClock_Hz) in SDHC_SetSdClock()
913 nearestFrequency = srcClock_Hz / divisor / prescaler; in SDHC_SetSdClock()
919 nearestFrequency = srcClock_Hz / divisor; in SDHC_SetSdClock()
928 nearestFrequency = srcClock_Hz; in SDHC_SetSdClock()
A Dfsl_enet.c134 uint32_t srcClock_Hz);
307 uint32_t srcClock_Hz) in ENET_Init() argument
351 ENET_SetMacController(base, config, bufferConfig, macAddr, srcClock_Hz); in ENET_Init()
421 uint32_t srcClock_Hz) in ENET_SetMacController() argument
515 … ENET_SetSMI(base, srcClock_Hz, !!(config->macSpecialConfig & kENET_ControlSMIPreambleDisable)); in ENET_SetMacController()
685 void ENET_SetSMI(ENET_Type *base, uint32_t srcClock_Hz, bool isPreambleDisabled) in ENET_SetSMI() argument
687 assert(srcClock_Hz); in ENET_SetSMI()
694 speed = srcClock_Hz / (2 * ENET_MDC_FREQUENCY); in ENET_SetSMI()
696 …clkCycle = (10 + ENET_NANOSECOND_ONE_SECOND / srcClock_Hz - 1) / (ENET_NANOSECOND_ONE_SECOND / src… in ENET_SetSMI()
A Dfsl_dspi.h448 void DSPI_MasterInit(SPI_Type *base, const dspi_master_config_t *masterConfig, uint32_t srcClock_Hz…
797 uint32_t srcClock_Hz);
848 uint32_t srcClock_Hz,
A Dfsl_i2c.c472 void I2C_MasterInit(I2C_Type *base, const i2c_master_config_t *masterConfig, uint32_t srcClock_Hz) in I2C_MasterInit() argument
474 assert(masterConfig && srcClock_Hz); in I2C_MasterInit()
506 I2C_MasterSetBaudRate(base, masterConfig->baudRate_Bps, srcClock_Hz); in I2C_MasterInit()
631 void I2C_MasterSetBaudRate(I2C_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz) in I2C_MasterSetBaudRate() argument
651 computedRate = srcClock_Hz / (multiplier * s_i2cDividerTable[i]); in I2C_MasterSetBaudRate()
1203 void I2C_SlaveInit(I2C_Type *base, const i2c_slave_config_t *slaveConfig, uint32_t srcClock_Hz) in I2C_SlaveInit() argument
1262 I2C_SetHoldTime(base, slaveConfig->sclStopHoldTime_ns, srcClock_Hz); in I2C_SlaveInit()
A Dfsl_uart.h253 status_t UART_Init(UART_Type *base, const uart_config_t *config, uint32_t srcClock_Hz);
297 status_t UART_SetBaudRate(UART_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz);
A Dfsl_ftm.c336 uint32_t srcClock_Hz) in FTM_SetupPwm() argument
339 assert(srcClock_Hz); in FTM_SetupPwm()
344 uint32_t ftmClock = (srcClock_Hz / (1U << (base->SC & FTM_SC_PS_MASK))); in FTM_SetupPwm()
A Dfsl_enet.h602 uint32_t srcClock_Hz);
651 void ENET_SetSMI(ENET_Type *base, uint32_t srcClock_Hz, bool isPreambleDisabled);
/bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/drivers/
A Dfsl_lpuart.c211 status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz) in LPUART_Init() argument
236 sbrTemp = (srcClock_Hz / (config->baudRate_Bps * osrTemp)); in LPUART_Init()
243 calculatedBaud = (srcClock_Hz / (osrTemp * sbrTemp)); in LPUART_Init()
248 if (tempDiff > (config->baudRate_Bps - (srcClock_Hz / (osrTemp * (sbrTemp + 1))))) in LPUART_Init()
250 tempDiff = config->baudRate_Bps - (srcClock_Hz / (osrTemp * (sbrTemp + 1))); in LPUART_Init()
492 status_t LPUART_SetBaudRate(LPUART_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz) in LPUART_SetBaudRate() argument
512 sbrTemp = (srcClock_Hz / (baudRate_Bps * osrTemp)); in LPUART_SetBaudRate()
519 calculatedBaud = (srcClock_Hz / (osrTemp * sbrTemp)); in LPUART_SetBaudRate()
524 if (tempDiff > (baudRate_Bps - (srcClock_Hz / (osrTemp * (sbrTemp + 1))))) in LPUART_SetBaudRate()
526 tempDiff = baudRate_Bps - (srcClock_Hz / (osrTemp * (sbrTemp + 1))); in LPUART_SetBaudRate()
A Dfsl_flexio_i2c_master.h153 …_MasterInit(FLEXIO_I2C_Type *base, flexio_i2c_master_config_t *masterConfig, uint32_t srcClock_Hz);
261 …d FLEXIO_I2C_MasterSetBaudRate(FLEXIO_I2C_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz);
A Dfsl_lpspi.c167 …LPSPI_MasterInit(LPSPI_Type *base, const lpspi_master_config_t *masterConfig, uint32_t srcClock_Hz) in LPSPI_MasterInit() argument
200 LPSPI_MasterSetBaudRate(base, masterConfig->baudRate, srcClock_Hz, &tcrPrescaleValue); in LPSPI_MasterInit()
212 …PSPI_MasterSetDelayTimes(base, masterConfig->pcsToSckDelayInNanoSec, kLPSPI_PcsToSck, srcClock_Hz); in LPSPI_MasterInit()
213 …terSetDelayTimes(base, masterConfig->lastSckToPcsDelayInNanoSec, kLPSPI_LastSckToPcs, srcClock_Hz); in LPSPI_MasterInit()
214 …DelayTimes(base, masterConfig->betweenTransferDelayInNanoSec, kLPSPI_BetweenTransfer, srcClock_Hz); in LPSPI_MasterInit()
337 uint32_t srcClock_Hz, in LPSPI_MasterSetBaudRate() argument
375 realBaudrate = (srcClock_Hz / (s_baudratePrescaler[prescaler] * (scaler + 2U))); in LPSPI_MasterSetBaudRate()
435 uint32_t srcClock_Hz) in LPSPI_MasterSetDelayTimes() argument
449 …srcClock_Hz / s_baudratePrescaler[(base->TCR & LPSPI_TCR_PRESCALE_MASK) >> LPSPI_TCR_PRESCALE_SHIF… in LPSPI_MasterSetDelayTimes()
A Dfsl_lpspi.h428 …PSPI_MasterInit(LPSPI_Type *base, const lpspi_master_config_t *masterConfig, uint32_t srcClock_Hz);
819 uint32_t srcClock_Hz,
877 uint32_t srcClock_Hz);
A Dfsl_usdhc.c814 uint32_t USDHC_SetSdClock(USDHC_Type *base, uint32_t srcClock_Hz, uint32_t busClock_Hz) in USDHC_SetSdClock() argument
816 assert(srcClock_Hz != 0U); in USDHC_SetSdClock()
817 assert((busClock_Hz != 0U) && (busClock_Hz <= srcClock_Hz)); in USDHC_SetSdClock()
833 totalDiv = srcClock_Hz / busClock_Hz; in USDHC_SetSdClock()
838 if ((srcClock_Hz / totalDiv) > busClock_Hz) in USDHC_SetSdClock()
859 nearestFrequency = srcClock_Hz / divisor / prescaler; in USDHC_SetSdClock()
875 nearestFrequency = srcClock_Hz / totalDiv; in USDHC_SetSdClock()
885 nearestFrequency = srcClock_Hz; in USDHC_SetSdClock()
A Dfsl_flexio_i2c_master.c349 …C_MasterInit(FLEXIO_I2C_Type *base, flexio_i2c_master_config_t *masterConfig, uint32_t srcClock_Hz) in FLEXIO_I2C_MasterInit() argument
413 timerDiv = (srcClock_Hz / masterConfig->baudRate_Bps) / 2 - 1; in FLEXIO_I2C_MasterInit()
537 …id FLEXIO_I2C_MasterSetBaudRate(FLEXIO_I2C_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz) in FLEXIO_I2C_MasterSetBaudRate() argument
544 timerDiv = srcClock_Hz / baudRate_Bps; in FLEXIO_I2C_MasterSetBaudRate()
A Dfsl_lpuart.h312 status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz);
359 status_t LPUART_SetBaudRate(LPUART_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz);
A Dfsl_tpm.c143 uint32_t srcClock_Hz) in TPM_SetupPwm() argument
148 assert(srcClock_Hz); in TPM_SetupPwm()
157 uint32_t tpmClock = (srcClock_Hz / (1U << (base->SC & TPM_SC_PS_MASK))); in TPM_SetupPwm()
A Dfsl_flexio_uart.h171 …IO_UART_Init(FLEXIO_UART_Type *base, const flexio_uart_config_t *userConfig, uint32_t srcClock_Hz);
A Dfsl_tpm.h345 uint32_t srcClock_Hz);
/bsp/nxp/lpc/lpc54608-LPCXpresso/drivers/
A Dfsl_phy.c69 status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz) in PHY_Init() argument
82 ENET_SetSMI(base, srcClock_Hz, false); in PHY_Init()
A Dfsl_phy.h122 status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz);
/bsp/frdm-k64f/board/
A Dfsl_phy.c65 status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz) in PHY_Init() argument
77 ENET_SetSMI(base, srcClock_Hz, false); in PHY_Init()
A Dfsl_phy.h141 status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz);
/bsp/cvitek/drivers/
A Ddrv_sdhci.c46 static uint32_t sdhci_set_card_clock(rt_ubase_t base, uint32_t srcClock_Hz, uint32_t target_HZ) in sdhci_set_card_clock() argument
54 if (srcClock_Hz <= target_HZ ) in sdhci_set_card_clock()
62 if(srcClock_Hz / (2*divider) <= target_HZ) in sdhci_set_card_clock()
122 static uint32_t SDIF_ChangeCardClock(rt_ubase_t base, uint32_t srcClock_Hz, uint32_t target_HZ) in SDIF_ChangeCardClock() argument
135 if (srcClock_Hz <= target_HZ ) in SDIF_ChangeCardClock()
143 if(srcClock_Hz / (2*divider) <= target_HZ) in SDIF_ChangeCardClock()

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