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Searched refs:src_clk (Results 1 – 9 of 9) sorted by relevance

/bsp/rockchip/rk3500/driver/clk/
A Dclk-rk3568.c1611 int src_clk; in bus_set_clk() local
1719 int src_clk; in perimid_set_clk() local
1866 int src_clk; in top_set_clk() local
1996 int src_clk; in i2c_set_clk() local
2068 int src_clk; in spi_set_clk() local
2142 int src_clk; in pwm_set_clk() local
2463 int src_clk; in sdmmc_set_clk() local
2540 int src_clk; in sfc_set_clk() local
2597 int src_clk; in nand_set_clk() local
2652 int src_clk; in emmc_set_clk() local
[all …]
A Dclk-rk3588.c1113 int src_clk; in rk3588_center_set_clk() local
1227 int src_clk, src_clk_div; in rk3588_top_set_clk() local
1244 (src_clk << in rk3588_top_set_clk()
1336 int src_clk; in rk3588_i2c_set_clk() local
1433 int src_clk; in rk3588_spi_set_clk() local
1440 src_clk = CLK_SPI_SEL_24M; in rk3588_spi_set_clk()
1520 int src_clk; in rk3588_pwm_set_clk() local
1525 src_clk = CLK_PWM_SEL_50M; in rk3588_pwm_set_clk()
1527 src_clk = CLK_PWM_SEL_24M; in rk3588_pwm_set_clk()
1725 int src_clk, div; in rk3588_mmc_set_clk() local
[all …]
/bsp/nxp/imx/imxrt/libraries/drivers/
A Ddrv_sdio.c338 uint32_t src_clk; in _mmc_set_iocfg() local
363 src_clk = CLOCK_GetRootClockFreq(kCLOCK_Root_Usdhc1); in _mmc_set_iocfg()
371 src_clk = 396000000U / 2U; in _mmc_set_iocfg()
373 src_clk = (CLOCK_GetSysPfdFreq(kCLOCK_Pfd2) / (CLOCK_GetDiv(mmcsd->usdhc_div) + 1U)); in _mmc_set_iocfg()
375 MMCSD_DGB("\tsrc_clk: %d, usdhc_clk: %d, bus_width: %d\n", src_clk, usdhc_clk, bus_width); in _mmc_set_iocfg()
379 USDHC_SetSdClock(mmcsd->usdhc_host.base, src_clk, usdhc_clk); in _mmc_set_iocfg()
/bsp/nuvoton/libraries/ma35/rtt_port/
A Ddrv_wdt.c175 uint32_t src_clk, hz = 0; in nu_wdt_get_working_hz() local
177 src_clk = nu_wdt_get_module_clock(psNuWdt); in nu_wdt_get_working_hz()
179 switch (src_clk) in nu_wdt_get_working_hz()
197 LOG_D("[%s] modid=%x src_clk=%d src_hz=%d\n", psNuWdt->name, psNuWdt->modid, src_clk, hz); in nu_wdt_get_working_hz()
/bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/
A Dhal_spi.c10 void SPI_SetBaudrate(SPI_Type * SPIx, uint32_t src_clk, uint32_t baudrate) in SPI_SetBaudrate() argument
12 uint32_t div = src_clk / baudrate; in SPI_SetBaudrate()
/bsp/nxp/imx/imx6ull-smart/drivers/
A Ddrv_sdio.c556 uint32_t src_clk; in _mmc_set_iocfg() local
569 src_clk = (CLOCK_GetSysPfdFreq(kCLOCK_Pfd2) / (CLOCK_GetDiv(mmcsd->usdhc_div) + 1U)); in _mmc_set_iocfg()
571 LOG_D("\tsrc_clk: %d, usdhc_clk: %d, bus_width: %d\n", src_clk, usdhc_clk, bus_width); in _mmc_set_iocfg()
574 USDHC_SetSdClock(mmcsd->usdhc_host.base, src_clk, usdhc_clk); in _mmc_set_iocfg()
/bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Src/
A Dhal_can.c662 void CAN_AutoCfg_BaudParam(CAN_Peli_InitTypeDef* init_struct, u32 src_clk, u32 baud) in CAN_AutoCfg_BaudParam() argument
666 while ((baud == 0) || (src_clk == 0)) in CAN_AutoCfg_BaudParam()
668 sumPrescaler = src_clk / baud; in CAN_AutoCfg_BaudParam()
/bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Inc/
A Dhal_can.h320 void CAN_AutoCfg_BaudParam(CAN_Peli_InitTypeDef* init_struct, u32 src_clk, u32 baud);
/bsp/allwinner/libraries/sunxi-hal/hal/source/twi/
A Dhal_twi.c123 unsigned int src_clk = clk_in / 10; in twi_set_clock() local
124 unsigned int divider = src_clk / sclk_req; /* 400khz or 100khz */ in twi_set_clock()
145 sclk_real = src_clk / (clk_m + 1) / _2_pow_clk_n; in twi_set_clock()
573 uint32_t src_clk = clk_in / 10;
574 uint32_t divider = src_clk / sclk_freq; /* 400khz or 100khz */
595 sclk_real = src_clk / (clk_m + 1) / _2_pow_clk_n;

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