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Searched refs:systemREG2 (Results 1 – 2 of 2) sorted by relevance

/bsp/rm48x50/HALCoGen/source/
A Dsystem.c83 systemREG2->PLLCTL3 = ((2U - 1U) << 29U) in setupPLL()
223 systemREG2->PLLCTL3 = (systemREG2->PLLCTL3 & 0xE0FFFFFFU)|((1U - 1U)<< 24U); in mapClocks()
238 systemREG2->CLK2CNTL = (systemREG2->CLK2CNTL & 0xFFFFF0F0U) in mapClocks()
255 systemREG2->VCLKACON1 = ((1U - 1U ) << 24U) in mapClocks()
474 config_reg->CONFIG_PLLCTL3 = systemREG2->PLLCTL3; in systemGetConfigValue()
475 config_reg->CONFIG_STCCLKDIV = systemREG2->STCCLKDIV; in systemGetConfigValue()
476 config_reg->CONFIG_CLK2CNTL = systemREG2->CLK2CNTL; in systemGetConfigValue()
477 config_reg->CONFIG_VCLKACON1 = systemREG2->VCLKACON1; in systemGetConfigValue()
478 config_reg->CONFIG_CLKSLIP = systemREG2->CLKSLIP; in systemGetConfigValue()
479 config_reg->CONFIG_EFC_CTLEN = systemREG2->EFC_CTLEN; in systemGetConfigValue()
/bsp/rm48x50/HALCoGen/include/
A Dreg_system.h156 #define systemREG2 ((systemBASE2_t *)0xFFFFE100U) macro

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