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Searched refs:tRAS (Results 1 – 12 of 12) sorted by relevance

/bsp/CME_M7/StdPeriph_Driver/inc/
A Dcmem7_ddr.h119 uint32_t tRAS; /*!< tRAS */ member
138 uint32_t tRAS; /*!< tRAS */ member
/bsp/apm32/libraries/APM32E10x_Library/APM32E10x_StdPeriphDriver/src/
A Dapm32e10x_dmc.c96 DMC->TIM0_B.RASMINTSEL = timingConfig->tRAS; in DMC_ConfigTiming()
123 timingConfig->tRAS = DMC_RAS_MINIMUM_5; in DMC_ConfigTimingStructInit()
/bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/
A Dapm32f10x_dmc.c97 DMC->TIM0_B.RASMINTSEL = timingConfig->tRAS; in DMC_ConfigTiming()
124 timingConfig->tRAS = DMC_RAS_MINIMUM_5; in DMC_ConfigTimingStructInit()
/bsp/apm32/libraries/APM32F4xx_Library/APM32F4xx_StdPeriphDriver/src/
A Dapm32f4xx_dmc.c94 DMC->TIM0_B.RASMINTSEL = timingConfig->tRAS; in DMC_ConfigTiming()
121 timingConfig->tRAS = DMC_RAS_MINIMUM_5; in DMC_ConfigTimingStructInit()
/bsp/apm32/libraries/APM32F4xx_Library/APM32F4xx_StdPeriphDriver/inc/
A Dapm32f4xx_dmc.h282 uint32_t tRAS : 4; /*!< DMC_RAS_MINIMUM_T */ member
/bsp/apm32/libraries/APM32E10x_Library/APM32E10x_StdPeriphDriver/inc/
A Dapm32e10x_dmc.h300 uint32_t tRAS : 4; /*!< DMC_RAS_MINIMUM_T */ member
/bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/inc/
A Dapm32f10x_dmc.h299 uint32_t tRAS : 4; /*!< DMC_RAS_MINIMUM_T */ member
/bsp/CME_M7/StdPeriph_Driver/src/
A Dcmem7_ddr.c472 DDRC->RAS_b.DI = ptr->tRAS; in DDR_Init()
484 DDRC->RAS_b.DI = ptr->tRAS; in DDR_Init()
/bsp/apm32/apm32e103ze-evalboard/board/ports/
A Ddrv_sdram.c148 …dmc_timing_config.tRAS = DMC_RAS_MINIMUM_5; //!< Configure line activation and precha… in SDRAM_Init()
/bsp/apm32/libraries/Drivers/drv_sdram/APM32E1/
A Ddrv_sdram.c148 …dmc_timing_config.tRAS = DMC_RAS_MINIMUM_5; //!< Configure line activation and precha… in SDRAM_Init()
/bsp/apm32/apm32f407zg-evalboard/board/ports/
A Ddrv_sdram.c138 …dmc_timing_config.tRAS = DMC_RAS_MINIMUM_2; //!< Configure line activation and precha… in SDRAM_Init()
/bsp/apm32/libraries/Drivers/drv_sdram/APM32F4/
A Ddrv_sdram.c138 …dmc_timing_config.tRAS = DMC_RAS_MINIMUM_2; //!< Configure line activation and precha… in SDRAM_Init()

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