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Searched refs:timer_base (Results 1 – 4 of 4) sorted by relevance

/bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/include/
A Ddw_timer_ll.h83 return (timer_base->TLC); in dw_timer_read_load()
87 timer_base->TLC = value; in dw_timer_write_load()
91 return (timer_base->TCV); in dw_timer_get_current()
95 timer_base->TCR |= (DW_TIMER_CTL_ENABLE_SEL_EN); in dw_timer_set_enable()
99 timer_base->TCR &= ~(DW_TIMER_CTL_ENABLE_SEL_EN); in dw_timer_set_disable()
107 timer_base->TCR &= ~(DW_TIMER_CTL_MODE_SEL_EN); in dw_timer_set_mode_free()
111 timer_base->TCR |= (DW_TIMER_CTL_MODE_SEL_EN); in dw_timer_set_mode_load()
119 timer_base->TCR |= (DW_TIMER_CTL_INT_MAKS_EN); in dw_timer_set_mask()
123 timer_base->TCR &= ~(DW_TIMER_CTL_INT_MAKS_EN); in dw_timer_set_unmask()
131 timer_base->TCR |= (DW_TIMER_CTL_HARD_TRIG_EN); in dw_timer_set_hardtrigger_en()
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/bsp/cvitek/drivers/
A Ddrv_timer.c224 return (timer_base->TLC); in hal_timer_read_load()
228 timer_base->TLC = value; in hal_timer_write_load()
232 return (timer_base->TCV); in hal_timer_get_current()
310 timer_base->TCR = 0U; in hal_timer_reset_register()
311 timer_base->TLC = 0U; in hal_timer_reset_register()
329 dw_timer_regs_t *timer_base = _tmr->base; in rt_hw_hwtmr_isr() local
331 if (hal_timer_get_int_status(timer_base)) in rt_hw_hwtmr_isr()
333 hal_timer_clear_irq(timer_base); in rt_hw_hwtmr_isr()
334 hal_timer_set_disable(timer_base); in rt_hw_hwtmr_isr()
339 hal_timer_set_enable(timer_base); in rt_hw_hwtmr_isr()
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/bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/drivers/
A Dtimer.c27 if (dw_timer_get_int_status(timer_base)) { in dw_timer_irq_handler()
32 dw_timer_clear_irq(timer_base); in dw_timer_irq_handler()
52 dw_timer_regs_t *timer_base = NULL; in csi_timer_init() local
90 dw_timer_set_mode_load(timer_base); in csi_timer_start()
93 dw_timer_set_disable(timer_base); in csi_timer_start()
94 dw_timer_set_enable(timer_base); in csi_timer_start()
95 dw_timer_set_unmask(timer_base); in csi_timer_start()
108 dw_timer_regs_t *timer_base; in csi_timer_stop() local
111 dw_timer_set_mask(timer_base); in csi_timer_stop()
112 dw_timer_set_disable(timer_base); in csi_timer_stop()
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/bsp/gd32/arm/libraries/gd32_drivers/
A Ddrv_hwtimer.c116 uint32_t timer_base = (uint32_t)timer->parent.user_data; in gd32_hwtimer_init() local
121 timer_internal_clock_config(timer_base); in gd32_hwtimer_init()
124 timer_init(timer_base, &initpara); in gd32_hwtimer_init()
125 __set_timerx_freq(timer_base, timer->info->maxfreq); in gd32_hwtimer_init()
132 uint32_t timer_base = (uint32_t)timer->parent.user_data; in gd32_hwtimer_start() local
143 timer_counter_value_config(timer_base, 0); in gd32_hwtimer_start()
144 timer_autoreload_value_config(timer_base, cnt - 1); in gd32_hwtimer_start()
145 timer_enable(timer_base); in gd32_hwtimer_start()
152 uint32_t timer_base = (uint32_t)timer->parent.user_data; in gd32_hwtimer_stop() local
154 timer_disable(timer_base); in gd32_hwtimer_stop()
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