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Searched refs:tx_config (Results 1 – 4 of 4) sorted by relevance

/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/
A Dbflb_ir.c28 tx_config->data_bits = 32; in bflb_ir_tx_init()
30 tx_config->tail_enable = 1; in bflb_ir_tx_init()
32 tx_config->head_enable = 1; in bflb_ir_tx_init()
35 tx_config->data_enable = 1; in bflb_ir_tx_init()
36 tx_config->swm_enable = 0; in bflb_ir_tx_init()
89 if (tx_config->output_modulation != 0 && tx_config->freerun_enable != 0) { in bflb_ir_tx_init()
101 …regval = (tx_config->pulse_width_unit & 0xfff) | tx_config->modu_width_1 << 16 | tx_config->modu_w… in bflb_ir_tx_init()
181 regval = tx_config->logic0_pulse_width_0 | tx_config->logic0_pulse_width_1 << 8 | \ in bflb_ir_tx_init()
182 tx_config->logic1_pulse_width_0 << 16 | tx_config->logic1_pulse_width_1 << 24; in bflb_ir_tx_init()
185 regval = tx_config->head_pulse_width_0 | tx_config->head_pulse_width_1 << 8 | \ in bflb_ir_tx_init()
[all …]
/bsp/stm32/stm32mp157a-st-ev1/board/ports/
A Ddrv_fdcan.c26 FDCAN_TxHeaderTypeDef tx_config; member
163 device->tx_config.Identifier = 0x1111112; in rt_fdcan_write()
164 device->tx_config.IdType = FDCAN_EXTENDED_ID; in rt_fdcan_write()
165 device->tx_config.TxFrameType = FDCAN_DATA_FRAME; in rt_fdcan_write()
166 device->tx_config.DataLength = FDCAN_DLC_BYTES_8; in rt_fdcan_write()
167 device->tx_config.ErrorStateIndicator = FDCAN_ESI_ACTIVE; in rt_fdcan_write()
168 device->tx_config.BitRateSwitch = FDCAN_BRS_OFF; in rt_fdcan_write()
169 device->tx_config.FDFormat = FDCAN_CLASSIC_CAN; in rt_fdcan_write()
170 device->tx_config.TxEventFifoControl = FDCAN_NO_TX_EVENTS; in rt_fdcan_write()
171 device->tx_config.MessageMarker = 0xCC; in rt_fdcan_write()
[all …]
/bsp/ck802/libraries/common/spi/
A Ddw_spi.c301 dma_config_t tx_config, rx_config; in dw_spi_dma_transfer() local
303 tx_config.src_inc = DMA_ADDR_INC; in dw_spi_dma_transfer()
304 tx_config.dst_inc = DMA_ADDR_CONSTANT; in dw_spi_dma_transfer()
305 tx_config.src_tw = DMA_DATAWIDTH_SIZE8; in dw_spi_dma_transfer()
306 tx_config.dst_tw = DMA_DATAWIDTH_SIZE8; in dw_spi_dma_transfer()
307 tx_config.hs_if = CKENUM_DMA_SPI1_TX; in dw_spi_dma_transfer()
308 tx_config.type = DMA_MEM2PERH; in dw_spi_dma_transfer()
352 …tx_ch, dma_send_buf, (uint8_t *) & (addr->DR), spi_priv->transfer_num, &tx_config, dw_spi_dma_even… in dw_spi_dma_transfer()
/bsp/bouffalo_lab/libraries/rt_drivers/
A Ddrv_spi.c175 struct bflb_dma_channel_config_s tx_config = { in spi_configure() local
188 bflb_dma_channel_init(bl_spi->dma_tx, &tx_config); in spi_configure()

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