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/bsp/Infineon/psoc6-evaluationkit-062S2/libs/TARGET_RTT-062S2/config/GeneratedSource/
A Dcycfg_capsense_defines.h39 #define CY_CAPSENSE_LP_WIDGET_COUNT (0u)
44 #define CY_CAPSENSE_SHIELD_PIN_COUNT (0u)
49 #define CY_CAPSENSE_RAW_HISTORY_SIZE (0u)
50 #define CY_CAPSENSE_IIR_HISTORY_LOW_SIZE (0u)
51 #define CY_CAPSENSE_RAW_ALP_HISTORY_SIZE (0u)
52 #define CY_CAPSENSE_POSITION_FILTER_HISTORY_SIZE (0u)
53 #define CY_CAPSENSE_TOUCH_FILTER_HISTORY_SIZE (0u)
54 #define CY_CAPSENSE_DIPLEX_SIZE (0u)
55 #define CY_CAPSENSE_CSD_TOUCHPAD_MAX_SENSORS_SIZE (0u)
56 #define CY_CAPSENSE_CSX_TOUCH_BUFFER_ENABLE (0u)
[all …]
A Dcycfg_capsense.c187 .portCshNum = 0u,
188 .pinCsh = 0u,
189 .pinCintA = 0u,
190 .pinCintB = 0u,
199 .csdVref = 0u,
504 .numRows = 0u,
688 .status = 0u,
860 .x = 0u,
861 .y = 0u,
862 .z = 0u,
[all …]
/bsp/yichip/yc3122-pos/Libraries/sdk/
A Dyc_gpio.c15 0u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x00 to 0x0F */
16 4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x10 to 0x1F */
17 5u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x20 to 0x2F */
18 4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x30 to 0x3F */
19 6u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x40 to 0x4F */
20 4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x50 to 0x5F */
21 5u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x60 to 0x6F */
22 4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x70 to 0x7F */
23 7u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x80 to 0x8F */
24 4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x90 to 0x9F */
[all …]
/bsp/Infineon/psoc6-cy8ckit-062s4/libs/TARGET_CY8CKIT-062S4/config/GeneratedSource/
A Dcycfg_capsense_defines.h39 #define CY_CAPSENSE_LP_WIDGET_COUNT (0u)
44 #define CY_CAPSENSE_SHIELD_PIN_COUNT (0u)
49 #define CY_CAPSENSE_RAW_HISTORY_SIZE (0u)
50 #define CY_CAPSENSE_IIR_HISTORY_LOW_SIZE (0u)
51 #define CY_CAPSENSE_POSITION_FILTER_HISTORY_SIZE (0u)
52 #define CY_CAPSENSE_TOUCH_FILTER_HISTORY_SIZE (0u)
53 #define CY_CAPSENSE_DIPLEX_SIZE (0u)
54 #define CY_CAPSENSE_CSD_TOUCHPAD_MAX_SENSORS_SIZE (0u)
55 #define CY_CAPSENSE_CSX_TOUCH_BUFFER_ENABLE (0u)
56 #define CY_CAPSENSE_CSX_TOUCH_HISTORY_SIZE (0u)
[all …]
A Dcycfg_capsense.c181 .portCshNum = 0u,
182 .pinCsh = 0u,
183 .pinCintA = 0u,
184 .pinCintB = 0u,
191 .csdVref = 0u,
486 .numRows = 0u,
658 .status = 0u,
830 .x = 0u,
831 .y = 0u,
832 .z = 0u,
[all …]
/bsp/Infineon/psoc6-cy8cproto-062S3-4343W/libs/TARGET_CY8CPROTO-062S3-4343W/config/GeneratedSource/
A Dcycfg_capsense_defines.h39 #define CY_CAPSENSE_LP_WIDGET_COUNT (0u)
44 #define CY_CAPSENSE_SHIELD_PIN_COUNT (0u)
49 #define CY_CAPSENSE_RAW_HISTORY_SIZE (0u)
50 #define CY_CAPSENSE_IIR_HISTORY_LOW_SIZE (0u)
51 #define CY_CAPSENSE_POSITION_FILTER_HISTORY_SIZE (0u)
52 #define CY_CAPSENSE_TOUCH_FILTER_HISTORY_SIZE (0u)
53 #define CY_CAPSENSE_DIPLEX_SIZE (0u)
54 #define CY_CAPSENSE_CSD_TOUCHPAD_MAX_SENSORS_SIZE (0u)
55 #define CY_CAPSENSE_CSX_TOUCH_BUFFER_ENABLE (0u)
56 #define CY_CAPSENSE_CSX_TOUCH_HISTORY_SIZE (0u)
[all …]
A Dcycfg_capsense.c181 .portCshNum = 0u,
182 .pinCsh = 0u,
183 .pinCintA = 0u,
184 .pinCintB = 0u,
191 .csdVref = 0u,
486 .numRows = 0u,
658 .status = 0u,
830 .x = 0u,
831 .y = 0u,
832 .z = 0u,
[all …]
/bsp/Infineon/psoc6-cy8ckit-062S2-43012/libs/TARGET_CY8CKIT-062S2-43012/config/GeneratedSource/
A Dcycfg_capsense_defines.h39 #define CY_CAPSENSE_LP_WIDGET_COUNT (0u)
44 #define CY_CAPSENSE_SHIELD_PIN_COUNT (0u)
49 #define CY_CAPSENSE_RAW_HISTORY_SIZE (0u)
50 #define CY_CAPSENSE_IIR_HISTORY_LOW_SIZE (0u)
51 #define CY_CAPSENSE_POSITION_FILTER_HISTORY_SIZE (0u)
52 #define CY_CAPSENSE_TOUCH_FILTER_HISTORY_SIZE (0u)
53 #define CY_CAPSENSE_DIPLEX_SIZE (0u)
54 #define CY_CAPSENSE_CSD_TOUCHPAD_MAX_SENSORS_SIZE (0u)
55 #define CY_CAPSENSE_CSX_TOUCH_BUFFER_ENABLE (0u)
56 #define CY_CAPSENSE_CSX_TOUCH_HISTORY_SIZE (0u)
[all …]
A Dcycfg_capsense.c181 .portCshNum = 0u,
182 .pinCsh = 0u,
191 .csdVref = 0u,
616 .numRows = 0u,
668 .tunerSt = 0u,
676 .status = 0u,
783 .raw = 0u,
848 .x = 0u,
849 .y = 0u,
850 .z = 0u,
[all …]
/bsp/Infineon/libraries/templates/PSOC62/libs/TARGET_CY8CKIT-062S2-43012/config/GeneratedSource/
A Dcycfg_capsense_defines.h39 #define CY_CAPSENSE_LP_WIDGET_COUNT (0u)
44 #define CY_CAPSENSE_SHIELD_PIN_COUNT (0u)
49 #define CY_CAPSENSE_RAW_HISTORY_SIZE (0u)
50 #define CY_CAPSENSE_IIR_HISTORY_LOW_SIZE (0u)
51 #define CY_CAPSENSE_POSITION_FILTER_HISTORY_SIZE (0u)
52 #define CY_CAPSENSE_TOUCH_FILTER_HISTORY_SIZE (0u)
53 #define CY_CAPSENSE_DIPLEX_SIZE (0u)
54 #define CY_CAPSENSE_CSD_TOUCHPAD_MAX_SENSORS_SIZE (0u)
55 #define CY_CAPSENSE_CSX_TOUCH_BUFFER_ENABLE (0u)
56 #define CY_CAPSENSE_CSX_TOUCH_HISTORY_SIZE (0u)
[all …]
A Dcycfg_capsense.c181 .portCshNum = 0u,
182 .pinCsh = 0u,
191 .csdVref = 0u,
616 .numRows = 0u,
668 .tunerSt = 0u,
676 .status = 0u,
783 .raw = 0u,
848 .x = 0u,
849 .y = 0u,
850 .z = 0u,
[all …]
/bsp/Infineon/psoc6-cy8ckit-062-WIFI-BT/libs/TARGET_CY8CKIT-062-WIFI-BT/config/GeneratedSource/
A Dcycfg_capsense_defines.h39 #define CY_CAPSENSE_LP_WIDGET_COUNT (0u)
44 #define CY_CAPSENSE_SHIELD_PIN_COUNT (0u)
49 #define CY_CAPSENSE_RAW_HISTORY_SIZE (0u)
50 #define CY_CAPSENSE_IIR_HISTORY_LOW_SIZE (0u)
51 #define CY_CAPSENSE_POSITION_FILTER_HISTORY_SIZE (0u)
52 #define CY_CAPSENSE_TOUCH_FILTER_HISTORY_SIZE (0u)
53 #define CY_CAPSENSE_DIPLEX_SIZE (0u)
54 #define CY_CAPSENSE_CSD_TOUCHPAD_MAX_SENSORS_SIZE (0u)
55 #define CY_CAPSENSE_CSX_TOUCH_BUFFER_ENABLE (0u)
56 #define CY_CAPSENSE_CSX_TOUCH_HISTORY_SIZE (0u)
[all …]
A Dcycfg_capsense.c181 .portCshNum = 0u,
182 .pinCsh = 0u,
191 .csdVref = 0u,
616 .numRows = 0u,
668 .tunerSt = 0u,
676 .status = 0u,
783 .raw = 0u,
848 .x = 0u,
849 .y = 0u,
850 .z = 0u,
[all …]
/bsp/Infineon/psoc6-cy8ckit-062-BLE/libs/TARGET_CY8CKIT-062-BLE/config/GeneratedSource/
A Dcycfg_capsense_defines.h39 #define CY_CAPSENSE_LP_WIDGET_COUNT (0u)
44 #define CY_CAPSENSE_SHIELD_PIN_COUNT (0u)
49 #define CY_CAPSENSE_RAW_HISTORY_SIZE (0u)
50 #define CY_CAPSENSE_IIR_HISTORY_LOW_SIZE (0u)
51 #define CY_CAPSENSE_POSITION_FILTER_HISTORY_SIZE (0u)
52 #define CY_CAPSENSE_TOUCH_FILTER_HISTORY_SIZE (0u)
53 #define CY_CAPSENSE_DIPLEX_SIZE (0u)
54 #define CY_CAPSENSE_CSD_TOUCHPAD_MAX_SENSORS_SIZE (0u)
55 #define CY_CAPSENSE_CSX_TOUCH_BUFFER_ENABLE (0u)
56 #define CY_CAPSENSE_CSX_TOUCH_HISTORY_SIZE (0u)
[all …]
A Dcycfg_capsense.c181 .portCshNum = 0u,
182 .pinCsh = 0u,
191 .csdVref = 0u,
616 .numRows = 0u,
668 .tunerSt = 0u,
676 .status = 0u,
783 .raw = 0u,
848 .x = 0u,
849 .y = 0u,
850 .z = 0u,
[all …]
/bsp/microchip/samd51-adafruit-metro-m4/bsp/hal/utils/include/
A Dutils.h202 #define clz(u) __builtin_clz(u) argument
280 #define ctz(u) __builtin_ctz(u) argument
284 …(u) & (1ul << 0) …
286 …: (u) & (1ul << 1) …
288 …: (u) & (1ul << 2) …
290 …: (u) & (1ul << 3) …
292 …: (u) & (1ul << 4) …
294 …: (u) & (1ul << 5) …
296 …: (u) & (1ul << 6) …
298 …: (u) & (1ul << 7) …
[all …]
/bsp/microchip/samc21/bsp/hal/utils/include/
A Dutils.h202 #define clz(u) __builtin_clz(u) argument
280 #define ctz(u) __builtin_ctz(u) argument
284 …(u) & (1ul << 0) …
286 …: (u) & (1ul << 1) …
288 …: (u) & (1ul << 2) …
290 …: (u) & (1ul << 3) …
292 …: (u) & (1ul << 4) …
294 …: (u) & (1ul << 5) …
296 …: (u) & (1ul << 6) …
298 …: (u) & (1ul << 7) …
[all …]
/bsp/microchip/saml10/bsp/hal/utils/include/
A Dutils.h202 #define clz(u) __builtin_clz(u) argument
280 #define ctz(u) __builtin_ctz(u) argument
284 …(u) & (1ul << 0) …
286 …: (u) & (1ul << 1) …
288 …: (u) & (1ul << 2) …
290 …: (u) & (1ul << 3) …
292 …: (u) & (1ul << 4) …
294 …: (u) & (1ul << 5) …
296 …: (u) & (1ul << 6) …
298 …: (u) & (1ul << 7) …
[all …]
/bsp/microchip/same70/bsp/hal/utils/include/
A Dutils.h202 #define clz(u) __builtin_clz(u) argument
280 #define ctz(u) __builtin_ctz(u) argument
284 …(u) & (1ul << 0) …
286 …: (u) & (1ul << 1) …
288 …: (u) & (1ul << 2) …
290 …: (u) & (1ul << 3) …
292 …: (u) & (1ul << 4) …
294 …: (u) & (1ul << 5) …
296 …: (u) & (1ul << 6) …
298 …: (u) & (1ul << 7) …
[all …]
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hal/utils/include/
A Dutils.h202 #define clz(u) __builtin_clz(u) argument
280 #define ctz(u) __builtin_ctz(u) argument
284 …(u) & (1ul << 0) …
286 …: (u) & (1ul << 1) …
288 …: (u) & (1ul << 2) …
290 …: (u) & (1ul << 3) …
292 …: (u) & (1ul << 4) …
294 …: (u) & (1ul << 5) …
296 …: (u) & (1ul << 6) …
298 …: (u) & (1ul << 7) …
[all …]
/bsp/microchip/same54/bsp/hal/utils/include/
A Dutils.h202 #define clz(u) __builtin_clz(u) argument
280 #define ctz(u) __builtin_ctz(u) argument
284 …(u) & (1ul << 0) …
286 …: (u) & (1ul << 1) …
288 …: (u) & (1ul << 2) …
290 …: (u) & (1ul << 3) …
292 …: (u) & (1ul << 4) …
294 …: (u) & (1ul << 5) …
296 …: (u) & (1ul << 6) …
298 …: (u) & (1ul << 7) …
[all …]
/bsp/hpmicro/libraries/hpm_sdk/utils/
A Dhpm_swap.c11 uint32_t __bswapsi2 (uint32_t u) in __bswapsi2() argument
13 return ((((u) & 0xff000000) >> 24) in __bswapsi2()
14 | (((u) & 0x00ff0000) >> 8) in __bswapsi2()
15 | (((u) & 0x0000ff00) << 8) in __bswapsi2()
16 | (((u) & 0x000000ff) << 24)); in __bswapsi2()
19 uint64_t __bswapdi2 (uint64_t u) in __bswapdi2() argument
22 | (((u) & 0x00ff000000000000ull) >> 40) in __bswapdi2()
23 | (((u) & 0x0000ff0000000000ull) >> 24) in __bswapdi2()
24 | (((u) & 0x000000ff00000000ull) >> 8) in __bswapdi2()
25 | (((u) & 0x00000000ff000000ull) << 8) in __bswapdi2()
[all …]
/bsp/stm32/libraries/templates/stm32wbxx/board/CubeMX_Config/Inc/
A Dstm32wbxx_hal_conf.h70 #define USE_HAL_ADC_REGISTER_CALLBACKS 0u
71 #define USE_HAL_COMP_REGISTER_CALLBACKS 0u
72 #define USE_HAL_CRYP_REGISTER_CALLBACKS 0u
73 #define USE_HAL_I2C_REGISTER_CALLBACKS 0u
74 #define USE_HAL_I2S_REGISTER_CALLBACKS 0u
75 #define USE_HAL_IRDA_REGISTER_CALLBACKS 0u
76 #define USE_HAL_LPTIM_REGISTER_CALLBACKS 0u
77 #define USE_HAL_PCD_REGISTER_CALLBACKS 0u
78 #define USE_HAL_PKA_REGISTER_CALLBACKS 0u
79 #define USE_HAL_QSPI_REGISTER_CALLBACKS 0u
[all …]
/bsp/stm32/stm32g030-tiny-board/board/CubeMX_Config/Inc/
A Dstm32g0xx_hal_conf.h73 #define USE_HAL_ADC_REGISTER_CALLBACKS 0u
74 #define USE_HAL_CEC_REGISTER_CALLBACKS 0u
75 #define USE_HAL_COMP_REGISTER_CALLBACKS 0u
76 #define USE_HAL_CRYP_REGISTER_CALLBACKS 0u
77 #define USE_HAL_DAC_REGISTER_CALLBACKS 0u
78 #define USE_HAL_FDCAN_REGISTER_CALLBACKS 0u
79 #define USE_HAL_HCD_REGISTER_CALLBACKS 0u
80 #define USE_HAL_I2C_REGISTER_CALLBACKS 0u
81 #define USE_HAL_I2S_REGISTER_CALLBACKS 0u
82 #define USE_HAL_IRDA_REGISTER_CALLBACKS 0u
[all …]
/bsp/stm32/stm32wb55-st-nucleo/board/CubeMX_Config/Inc/
A Dstm32wbxx_hal_conf.h70 #define USE_HAL_ADC_REGISTER_CALLBACKS 0u
71 #define USE_HAL_COMP_REGISTER_CALLBACKS 0u
72 #define USE_HAL_CRYP_REGISTER_CALLBACKS 0u
73 #define USE_HAL_I2C_REGISTER_CALLBACKS 0u
74 #define USE_HAL_I2S_REGISTER_CALLBACKS 0u
75 #define USE_HAL_IRDA_REGISTER_CALLBACKS 0u
76 #define USE_HAL_LPTIM_REGISTER_CALLBACKS 0u
77 #define USE_HAL_PCD_REGISTER_CALLBACKS 0u
78 #define USE_HAL_PKA_REGISTER_CALLBACKS 0u
79 #define USE_HAL_QSPI_REGISTER_CALLBACKS 0u
[all …]

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