| /bsp/msp432e401y-LaunchPad/libraries/msp432e4/driverlib/ |
| A D | fpu.c | 199 FPUHalfPrecisionModeSet(uint32_t ui32Mode) in FPUHalfPrecisionModeSet() argument
204 HWREG(NVIC_FPDSC) = (HWREG(NVIC_FPDSC) & ~(NVIC_FPDSC_AHP)) | ui32Mode; in FPUHalfPrecisionModeSet()
225 FPUNaNModeSet(uint32_t ui32Mode) in FPUNaNModeSet() argument
230 HWREG(NVIC_FPDSC) = (HWREG(NVIC_FPDSC) & ~(NVIC_FPDSC_DN)) | ui32Mode; in FPUNaNModeSet()
253 FPUFlushToZeroModeSet(uint32_t ui32Mode) in FPUFlushToZeroModeSet() argument
258 HWREG(NVIC_FPDSC) = (HWREG(NVIC_FPDSC) & ~(NVIC_FPDSC_FZ)) | ui32Mode; in FPUFlushToZeroModeSet()
285 FPURoundingModeSet(uint32_t ui32Mode) in FPURoundingModeSet() argument
290 HWREG(NVIC_FPDSC) = (HWREG(NVIC_FPDSC) & ~(NVIC_FPDSC_RMODE_M)) | ui32Mode; in FPURoundingModeSet()
|
| A D | ssi.c | 218 ASSERT((ui32Mode == SSI_MODE_MASTER) || in SSIConfigSetExpClk()
219 (ui32Mode == SSI_MODE_SLAVE)); in SSIConfigSetExpClk()
220 ASSERT(((ui32Mode == SSI_MODE_MASTER) && in SSIConfigSetExpClk()
222 ((ui32Mode != SSI_MODE_MASTER) && in SSIConfigSetExpClk()
934 ASSERT((ui32Mode == SSI_ADV_MODE_LEGACY) || in SSIAdvModeSet()
935 (ui32Mode == SSI_ADV_MODE_WRITE) || in SSIAdvModeSet()
937 (ui32Mode == SSI_ADV_MODE_BI_READ) || in SSIAdvModeSet()
938 (ui32Mode == SSI_ADV_MODE_BI_WRITE) || in SSIAdvModeSet()
939 (ui32Mode == SSI_ADV_MODE_QUAD_READ) || in SSIAdvModeSet()
940 (ui32Mode == SSI_ADV_MODE_QUAD_WRITE)); in SSIAdvModeSet()
[all …]
|
| A D | fpu.h | 99 extern void FPUHalfPrecisionModeSet(uint32_t ui32Mode);
100 extern void FPUNaNModeSet(uint32_t ui32Mode);
101 extern void FPUFlushToZeroModeSet(uint32_t ui32Mode);
102 extern void FPURoundingModeSet(uint32_t ui32Mode);
|
| A D | shamd5.c | 466 SHAMD5ConfigSet(uint32_t ui32Base, uint32_t ui32Mode) in SHAMD5ConfigSet() argument
472 ASSERT((ui32Mode == SHAMD5_ALGO_MD5) || in SHAMD5ConfigSet()
473 (ui32Mode == SHAMD5_ALGO_SHA1) || in SHAMD5ConfigSet()
474 (ui32Mode == SHAMD5_ALGO_SHA224) || in SHAMD5ConfigSet()
475 (ui32Mode == SHAMD5_ALGO_SHA256) || in SHAMD5ConfigSet()
476 (ui32Mode == SHAMD5_ALGO_HMAC_MD5) || in SHAMD5ConfigSet()
477 (ui32Mode == SHAMD5_ALGO_HMAC_SHA1) || in SHAMD5ConfigSet()
478 (ui32Mode == SHAMD5_ALGO_HMAC_SHA224) || in SHAMD5ConfigSet()
479 (ui32Mode == SHAMD5_ALGO_HMAC_SHA256)); in SHAMD5ConfigSet()
484 HWREG(ui32Base + SHAMD5_O_MODE) = ui32Mode; in SHAMD5ConfigSet()
|
| A D | udma.c | 730 uDMAChannelTransferSet(uint32_t ui32ChannelStructIndex, uint32_t ui32Mode, in uDMAChannelTransferSet() argument
744 ASSERT(ui32Mode <= UDMA_MODE_PER_SCATTER_GATHER); in uDMAChannelTransferSet()
773 if ((ui32Mode == UDMA_MODE_MEM_SCATTER_GATHER) || in uDMAChannelTransferSet()
774 (ui32Mode == UDMA_MODE_PER_SCATTER_GATHER)) in uDMAChannelTransferSet()
776 ui32Mode |= UDMA_MODE_ALT_SELECT; in uDMAChannelTransferSet()
784 ui32Control |= ui32Mode | ((ui32TransferSize - 1) << 4); in uDMAChannelTransferSet()
827 if ((ui32Mode == UDMA_MODE_MEM_SCATTER_GATHER) || in uDMAChannelTransferSet()
828 (ui32Mode == UDMA_MODE_PER_SCATTER_GATHER)) in uDMAChannelTransferSet()
|
| A D | udma.h | 169 ui32Mode) \ argument
180 ((((ui32Mode) == UDMA_MODE_MEM_SCATTER_GATHER) || \
181 ((ui32Mode) == UDMA_MODE_PER_SCATTER_GATHER)) ? \
182 (ui32Mode) | UDMA_MODE_ALT_SELECT : (ui32Mode)), 0 \
707 uint32_t ui32Mode, void *pvSrcAddr,
|
| A D | epi.c | 249 EPIModeSet(uint32_t ui32Base, uint32_t ui32Mode) in EPIModeSet() argument
255 ASSERT((ui32Mode == EPI_MODE_GENERAL) || in EPIModeSet()
256 (ui32Mode == EPI_MODE_SDRAM) || in EPIModeSet()
257 (ui32Mode == EPI_MODE_HB8) || in EPIModeSet()
258 (ui32Mode == EPI_MODE_HB16) || in EPIModeSet()
259 (ui32Mode == EPI_MODE_DISABLE)); in EPIModeSet()
264 HWREG(ui32Base + EPI_O_CFG) = ui32Mode; in EPIModeSet()
|
| A D | uart.c | 891 UARTFlowControlSet(uint32_t ui32Base, uint32_t ui32Mode) in UARTFlowControlSet() argument
897 ASSERT((ui32Mode & ~(UART_FLOWCONTROL_TX | UART_FLOWCONTROL_RX)) == 0); in UARTFlowControlSet()
904 UART_FLOWCONTROL_RX)) | ui32Mode); in UARTFlowControlSet()
956 UARTTxIntModeSet(uint32_t ui32Base, uint32_t ui32Mode) in UARTTxIntModeSet() argument
962 ASSERT((ui32Mode == UART_TXINT_MODE_EOT) || in UARTTxIntModeSet()
963 (ui32Mode == UART_TXINT_MODE_FIFO)); in UARTTxIntModeSet()
970 UART_TXINT_MODE_FIFO)) | ui32Mode); in UARTTxIntModeSet()
|
| /bsp/tm4c129x/libraries/driverlib/ |
| A D | fpu.c | 201 FPUHalfPrecisionModeSet(uint32_t ui32Mode) in FPUHalfPrecisionModeSet() argument
206 HWREG(NVIC_FPDSC) = (HWREG(NVIC_FPDSC) & ~(NVIC_FPDSC_AHP)) | ui32Mode; in FPUHalfPrecisionModeSet()
227 FPUNaNModeSet(uint32_t ui32Mode) in FPUNaNModeSet() argument
232 HWREG(NVIC_FPDSC) = (HWREG(NVIC_FPDSC) & ~(NVIC_FPDSC_DN)) | ui32Mode; in FPUNaNModeSet()
255 FPUFlushToZeroModeSet(uint32_t ui32Mode) in FPUFlushToZeroModeSet() argument
260 HWREG(NVIC_FPDSC) = (HWREG(NVIC_FPDSC) & ~(NVIC_FPDSC_FZ)) | ui32Mode; in FPUFlushToZeroModeSet()
287 FPURoundingModeSet(uint32_t ui32Mode) in FPURoundingModeSet() argument
292 HWREG(NVIC_FPDSC) = (HWREG(NVIC_FPDSC) & ~(NVIC_FPDSC_RMODE_M)) | ui32Mode; in FPURoundingModeSet()
|
| A D | ssi.c | 243 ASSERT((ui32Mode == SSI_MODE_MASTER) || in SSIConfigSetExpClk()
244 (ui32Mode == SSI_MODE_SLAVE)); in SSIConfigSetExpClk()
245 ASSERT(((ui32Mode == SSI_MODE_MASTER) && in SSIConfigSetExpClk()
247 ((ui32Mode != SSI_MODE_MASTER) && in SSIConfigSetExpClk()
971 ASSERT((ui32Mode == SSI_ADV_MODE_LEGACY) || in SSIAdvModeSet()
972 (ui32Mode == SSI_ADV_MODE_WRITE) || in SSIAdvModeSet()
974 (ui32Mode == SSI_ADV_MODE_BI_READ) || in SSIAdvModeSet()
975 (ui32Mode == SSI_ADV_MODE_BI_WRITE) || in SSIAdvModeSet()
976 (ui32Mode == SSI_ADV_MODE_QUAD_READ) || in SSIAdvModeSet()
977 (ui32Mode == SSI_ADV_MODE_QUAD_WRITE)); in SSIAdvModeSet()
[all …]
|
| A D | fpu.h | 99 extern void FPUHalfPrecisionModeSet(uint32_t ui32Mode);
100 extern void FPUNaNModeSet(uint32_t ui32Mode);
101 extern void FPUFlushToZeroModeSet(uint32_t ui32Mode);
102 extern void FPURoundingModeSet(uint32_t ui32Mode);
|
| A D | shamd5.c | 469 SHAMD5ConfigSet(uint32_t ui32Base, uint32_t ui32Mode) in SHAMD5ConfigSet() argument
475 ASSERT((ui32Mode == SHAMD5_ALGO_MD5) || in SHAMD5ConfigSet()
476 (ui32Mode == SHAMD5_ALGO_SHA1) || in SHAMD5ConfigSet()
477 (ui32Mode == SHAMD5_ALGO_SHA224) || in SHAMD5ConfigSet()
478 (ui32Mode == SHAMD5_ALGO_SHA256) || in SHAMD5ConfigSet()
479 (ui32Mode == SHAMD5_ALGO_HMAC_MD5) || in SHAMD5ConfigSet()
480 (ui32Mode == SHAMD5_ALGO_HMAC_SHA1) || in SHAMD5ConfigSet()
481 (ui32Mode == SHAMD5_ALGO_HMAC_SHA224) || in SHAMD5ConfigSet()
482 (ui32Mode == SHAMD5_ALGO_HMAC_SHA256)); in SHAMD5ConfigSet()
487 HWREG(ui32Base + SHAMD5_O_MODE) = ui32Mode; in SHAMD5ConfigSet()
|
| A D | udma.c | 710 uDMAChannelTransferSet(uint32_t ui32ChannelStructIndex, uint32_t ui32Mode, in uDMAChannelTransferSet() argument
724 ASSERT(ui32Mode <= UDMA_MODE_PER_SCATTER_GATHER); in uDMAChannelTransferSet()
753 if((ui32Mode == UDMA_MODE_MEM_SCATTER_GATHER) || in uDMAChannelTransferSet()
754 (ui32Mode == UDMA_MODE_PER_SCATTER_GATHER)) in uDMAChannelTransferSet()
756 ui32Mode |= UDMA_MODE_ALT_SELECT; in uDMAChannelTransferSet()
764 ui32Control |= ui32Mode | ((ui32TransferSize - 1) << 4); in uDMAChannelTransferSet()
807 if((ui32Mode == UDMA_MODE_MEM_SCATTER_GATHER) || in uDMAChannelTransferSet()
808 (ui32Mode == UDMA_MODE_PER_SCATTER_GATHER)) in uDMAChannelTransferSet()
|
| A D | udma.h | 168 ui32Mode) \ argument
179 ((((ui32Mode) == UDMA_MODE_MEM_SCATTER_GATHER) || \
180 ((ui32Mode) == UDMA_MODE_PER_SCATTER_GATHER)) ? \
181 (ui32Mode) | UDMA_MODE_ALT_SELECT : (ui32Mode)), 0 \
788 uint32_t ui32Mode, void *pvSrcAddr,
|
| A D | epi.c | 252 EPIModeSet(uint32_t ui32Base, uint32_t ui32Mode) in EPIModeSet() argument
258 ASSERT((ui32Mode == EPI_MODE_GENERAL) || in EPIModeSet()
259 (ui32Mode == EPI_MODE_SDRAM) || in EPIModeSet()
260 (ui32Mode == EPI_MODE_HB8) || in EPIModeSet()
261 (ui32Mode == EPI_MODE_HB16) || in EPIModeSet()
262 (ui32Mode == EPI_MODE_DISABLE)); in EPIModeSet()
267 HWREG(ui32Base + EPI_O_CFG) = ui32Mode; in EPIModeSet()
|
| /bsp/tm4c123bsp/libraries/TivaWare_C_series/tm4c123_driverlib/src/ |
| A D | fpu.c | 201 FPUHalfPrecisionModeSet(uint32_t ui32Mode) in FPUHalfPrecisionModeSet() argument
206 HWREG(NVIC_FPDSC) = (HWREG(NVIC_FPDSC) & ~(NVIC_FPDSC_AHP)) | ui32Mode; in FPUHalfPrecisionModeSet()
227 FPUNaNModeSet(uint32_t ui32Mode) in FPUNaNModeSet() argument
232 HWREG(NVIC_FPDSC) = (HWREG(NVIC_FPDSC) & ~(NVIC_FPDSC_DN)) | ui32Mode; in FPUNaNModeSet()
255 FPUFlushToZeroModeSet(uint32_t ui32Mode) in FPUFlushToZeroModeSet() argument
260 HWREG(NVIC_FPDSC) = (HWREG(NVIC_FPDSC) & ~(NVIC_FPDSC_FZ)) | ui32Mode; in FPUFlushToZeroModeSet()
287 FPURoundingModeSet(uint32_t ui32Mode) in FPURoundingModeSet() argument
292 HWREG(NVIC_FPDSC) = (HWREG(NVIC_FPDSC) & ~(NVIC_FPDSC_RMODE_M)) | ui32Mode; in FPURoundingModeSet()
|
| A D | ssi.c | 243 ASSERT((ui32Mode == SSI_MODE_MASTER) || in SSIConfigSetExpClk()
244 (ui32Mode == SSI_MODE_SLAVE)); in SSIConfigSetExpClk()
245 ASSERT(((ui32Mode == SSI_MODE_MASTER) && in SSIConfigSetExpClk()
247 ((ui32Mode != SSI_MODE_MASTER) && in SSIConfigSetExpClk()
971 ASSERT((ui32Mode == SSI_ADV_MODE_LEGACY) || in SSIAdvModeSet()
972 (ui32Mode == SSI_ADV_MODE_WRITE) || in SSIAdvModeSet()
974 (ui32Mode == SSI_ADV_MODE_BI_READ) || in SSIAdvModeSet()
975 (ui32Mode == SSI_ADV_MODE_BI_WRITE) || in SSIAdvModeSet()
976 (ui32Mode == SSI_ADV_MODE_QUAD_READ) || in SSIAdvModeSet()
977 (ui32Mode == SSI_ADV_MODE_QUAD_WRITE)); in SSIAdvModeSet()
[all …]
|
| A D | shamd5.c | 469 SHAMD5ConfigSet(uint32_t ui32Base, uint32_t ui32Mode) in SHAMD5ConfigSet() argument
475 ASSERT((ui32Mode == SHAMD5_ALGO_MD5) || in SHAMD5ConfigSet()
476 (ui32Mode == SHAMD5_ALGO_SHA1) || in SHAMD5ConfigSet()
477 (ui32Mode == SHAMD5_ALGO_SHA224) || in SHAMD5ConfigSet()
478 (ui32Mode == SHAMD5_ALGO_SHA256) || in SHAMD5ConfigSet()
479 (ui32Mode == SHAMD5_ALGO_HMAC_MD5) || in SHAMD5ConfigSet()
480 (ui32Mode == SHAMD5_ALGO_HMAC_SHA1) || in SHAMD5ConfigSet()
481 (ui32Mode == SHAMD5_ALGO_HMAC_SHA224) || in SHAMD5ConfigSet()
482 (ui32Mode == SHAMD5_ALGO_HMAC_SHA256)); in SHAMD5ConfigSet()
487 HWREG(ui32Base + SHAMD5_O_MODE) = ui32Mode; in SHAMD5ConfigSet()
|
| A D | udma.c | 710 uDMAChannelTransferSet(uint32_t ui32ChannelStructIndex, uint32_t ui32Mode, in uDMAChannelTransferSet() argument
724 ASSERT(ui32Mode <= UDMA_MODE_PER_SCATTER_GATHER); in uDMAChannelTransferSet()
753 if((ui32Mode == UDMA_MODE_MEM_SCATTER_GATHER) || in uDMAChannelTransferSet()
754 (ui32Mode == UDMA_MODE_PER_SCATTER_GATHER)) in uDMAChannelTransferSet()
756 ui32Mode |= UDMA_MODE_ALT_SELECT; in uDMAChannelTransferSet()
764 ui32Control |= ui32Mode | ((ui32TransferSize - 1) << 4); in uDMAChannelTransferSet()
807 if((ui32Mode == UDMA_MODE_MEM_SCATTER_GATHER) || in uDMAChannelTransferSet()
808 (ui32Mode == UDMA_MODE_PER_SCATTER_GATHER)) in uDMAChannelTransferSet()
|
| A D | epi.c | 252 EPIModeSet(uint32_t ui32Base, uint32_t ui32Mode) in EPIModeSet() argument
258 ASSERT((ui32Mode == EPI_MODE_GENERAL) || in EPIModeSet()
259 (ui32Mode == EPI_MODE_SDRAM) || in EPIModeSet()
260 (ui32Mode == EPI_MODE_HB8) || in EPIModeSet()
261 (ui32Mode == EPI_MODE_HB16) || in EPIModeSet()
262 (ui32Mode == EPI_MODE_DISABLE)); in EPIModeSet()
267 HWREG(ui32Base + EPI_O_CFG) = ui32Mode; in EPIModeSet()
|
| A D | uart.c | 954 UARTFlowControlSet(uint32_t ui32Base, uint32_t ui32Mode) in UARTFlowControlSet() argument
960 ASSERT((ui32Mode & ~(UART_FLOWCONTROL_TX | UART_FLOWCONTROL_RX)) == 0); in UARTFlowControlSet()
967 UART_FLOWCONTROL_RX)) | ui32Mode); in UARTFlowControlSet()
1027 UARTTxIntModeSet(uint32_t ui32Base, uint32_t ui32Mode) in UARTTxIntModeSet() argument
1033 ASSERT((ui32Mode == UART_TXINT_MODE_EOT) || in UARTTxIntModeSet()
1034 (ui32Mode == UART_TXINT_MODE_FIFO)); in UARTTxIntModeSet()
1041 UART_TXINT_MODE_FIFO)) | ui32Mode); in UARTTxIntModeSet()
|
| /bsp/tm4c123bsp/libraries/TivaWare_C_series/tm4c123_driverlib/driverlib/ |
| A D | fpu.h | 99 extern void FPUHalfPrecisionModeSet(uint32_t ui32Mode);
100 extern void FPUNaNModeSet(uint32_t ui32Mode);
101 extern void FPUFlushToZeroModeSet(uint32_t ui32Mode);
102 extern void FPURoundingModeSet(uint32_t ui32Mode);
|
| A D | udma.h | 168 ui32Mode) \ argument
179 ((((ui32Mode) == UDMA_MODE_MEM_SCATTER_GATHER) || \
180 ((ui32Mode) == UDMA_MODE_PER_SCATTER_GATHER)) ? \
181 (ui32Mode) | UDMA_MODE_ALT_SELECT : (ui32Mode)), 0 \
788 uint32_t ui32Mode, void *pvSrcAddr,
|
| /bsp/apollo2/libraries/drivers/hal/ |
| A D | am_hal_ctimer.c | 1242 uint32_t ui32Mode, ui32Comp0, ui32Comp1; in am_hal_ctimer_period_set() local
1271 ui32Mode = *pui32ControlReg; in am_hal_ctimer_period_set() local
1274 ui32Mode = ui32Mode >> 16; in am_hal_ctimer_period_set()
1280 ui32Mode = ui32Mode & AM_REG_CTIMER_CTRL0_TMRA0FN_M; in am_hal_ctimer_period_set()
1286 if (ui32Mode == AM_HAL_CTIMER_FN_PWM_ONCE || in am_hal_ctimer_period_set()
1287 ui32Mode == AM_HAL_CTIMER_FN_PWM_REPEAT) in am_hal_ctimer_period_set()
|
| /bsp/tm4c123bsp/libraries/Drivers/ |
| A D | drv_spi.c | 74 uint32_t ui32Protocol, ui32Mode; in tm4c123_spi_configure() local
82 ui32Mode = SSI_MODE_SLAVE; in tm4c123_spi_configure()
86 ui32Mode = SSI_MODE_MASTER; in tm4c123_spi_configure()
127 ui32Mode, ui32BitRate, ui32DataWidth); in tm4c123_spi_configure()
|