Home
last modified time | relevance | path

Searched refs:ui32Phase (Results 1 – 10 of 10) sorted by relevance

/bsp/tm4c123bsp/libraries/TivaWare_C_series/tm4c123_driverlib/src/
A Dadc.c1765 ADCPhaseDelaySet(uint32_t ui32Base, uint32_t ui32Phase) in ADCPhaseDelaySet() argument
1771 ASSERT((ui32Phase == ADC_PHASE_0) || (ui32Phase == ADC_PHASE_22_5) || in ADCPhaseDelaySet()
1772 (ui32Phase == ADC_PHASE_45) || (ui32Phase == ADC_PHASE_67_5) || in ADCPhaseDelaySet()
1773 (ui32Phase == ADC_PHASE_90) || (ui32Phase == ADC_PHASE_112_5) || in ADCPhaseDelaySet()
1774 (ui32Phase == ADC_PHASE_135) || (ui32Phase == ADC_PHASE_157_5) || in ADCPhaseDelaySet()
1775 (ui32Phase == ADC_PHASE_180) || (ui32Phase == ADC_PHASE_202_5) || in ADCPhaseDelaySet()
1776 (ui32Phase == ADC_PHASE_225) || (ui32Phase == ADC_PHASE_247_5) || in ADCPhaseDelaySet()
1777 (ui32Phase == ADC_PHASE_270) || (ui32Phase == ADC_PHASE_292_5) || in ADCPhaseDelaySet()
1778 (ui32Phase == ADC_PHASE_315) || (ui32Phase == ADC_PHASE_337_5)); in ADCPhaseDelaySet()
1783 HWREG(ui32Base + ADC_O_SPC) = ui32Phase; in ADCPhaseDelaySet()
/bsp/tm4c129x/libraries/driverlib/
A Dadc.c1770 ADCPhaseDelaySet(uint32_t ui32Base, uint32_t ui32Phase) in ADCPhaseDelaySet() argument
1776 ASSERT((ui32Phase == ADC_PHASE_0) || (ui32Phase == ADC_PHASE_22_5) || in ADCPhaseDelaySet()
1777 (ui32Phase == ADC_PHASE_45) || (ui32Phase == ADC_PHASE_67_5) || in ADCPhaseDelaySet()
1778 (ui32Phase == ADC_PHASE_90) || (ui32Phase == ADC_PHASE_112_5) || in ADCPhaseDelaySet()
1779 (ui32Phase == ADC_PHASE_135) || (ui32Phase == ADC_PHASE_157_5) || in ADCPhaseDelaySet()
1780 (ui32Phase == ADC_PHASE_180) || (ui32Phase == ADC_PHASE_202_5) || in ADCPhaseDelaySet()
1781 (ui32Phase == ADC_PHASE_225) || (ui32Phase == ADC_PHASE_247_5) || in ADCPhaseDelaySet()
1782 (ui32Phase == ADC_PHASE_270) || (ui32Phase == ADC_PHASE_292_5) || in ADCPhaseDelaySet()
1783 (ui32Phase == ADC_PHASE_315) || (ui32Phase == ADC_PHASE_337_5)); in ADCPhaseDelaySet()
1788 HWREG(ui32Base + ADC_O_SPC) = ui32Phase; in ADCPhaseDelaySet()
A Dadc.h312 extern void ADCPhaseDelaySet(uint32_t ui32Base, uint32_t ui32Phase);
A Drom.h405 uint32_t ui32Phase))ROM_ADCTABLE[24])
/bsp/msp432e401y-LaunchPad/libraries/msp432e4/driverlib/
A Dadc.c1703 ADCPhaseDelaySet(uint32_t ui32Base, uint32_t ui32Phase) in ADCPhaseDelaySet() argument
1709 ASSERT((ui32Phase == ADC_PHASE_0) || (ui32Phase == ADC_PHASE_22_5) || in ADCPhaseDelaySet()
1710 (ui32Phase == ADC_PHASE_45) || (ui32Phase == ADC_PHASE_67_5) || in ADCPhaseDelaySet()
1711 (ui32Phase == ADC_PHASE_90) || (ui32Phase == ADC_PHASE_112_5) || in ADCPhaseDelaySet()
1712 (ui32Phase == ADC_PHASE_135) || (ui32Phase == ADC_PHASE_157_5) || in ADCPhaseDelaySet()
1713 (ui32Phase == ADC_PHASE_180) || (ui32Phase == ADC_PHASE_202_5) || in ADCPhaseDelaySet()
1714 (ui32Phase == ADC_PHASE_225) || (ui32Phase == ADC_PHASE_247_5) || in ADCPhaseDelaySet()
1715 (ui32Phase == ADC_PHASE_270) || (ui32Phase == ADC_PHASE_292_5) || in ADCPhaseDelaySet()
1716 (ui32Phase == ADC_PHASE_315) || (ui32Phase == ADC_PHASE_337_5)); in ADCPhaseDelaySet()
1721 HWREG(ui32Base + ADC_O_SPC) = ui32Phase; in ADCPhaseDelaySet()
A Dadc.h310 extern void ADCPhaseDelaySet(uint32_t ui32Base, uint32_t ui32Phase);
A Drom.h168 uint32_t ui32Phase))ROM_ADCTABLE[24])
/bsp/tm4c123bsp/libraries/TivaWare_C_series/tm4c123_driverlib/driverlib/
A Dadc.h312 extern void ADCPhaseDelaySet(uint32_t ui32Base, uint32_t ui32Phase);
A Drom.h405 uint32_t ui32Phase))ROM_ADCTABLE[24])
/bsp/apollo2/libraries/drivers/hal/
A Dam_hal_iom.c541 uint64_t iom_get_interface_clock_cfg(uint32_t ui32FreqHz, uint32_t ui32Phase ) in iom_get_interface_clock_cfg() argument
601 if (ui32Phase == 1) in iom_get_interface_clock_cfg()

Completed in 70 milliseconds