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Searched refs:voltage (Results 1 – 25 of 79) sorted by relevance

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/bsp/allwinner/libraries/sunxi-hal/hal/source/regulator/
A Daxp.c11 static int voltage2val(struct regulator_desc *info, int voltage, u8 *reg_val) in voltage2val() argument
17 *reg_val = (voltage - info->min_uv + info->step1_uv - 1) in voltage2val()
29 if (!(voltage <= linear_max_uV && voltage >= range->min_uV)) in voltage2val()
36 *reg_val = (voltage - range->min_uV) / range->uV_step; in voltage2val()
46 static int val2voltage(struct regulator_desc *info, u8 reg_val, int *voltage) in val2voltage() argument
52 *voltage = info->min_uv + info->step1_uv * reg_val; in val2voltage()
60 *voltage = (reg_val - range->min_sel) * range->uV_step + in val2voltage()
/bsp/microchip/samc21/bsp/hal/documentation/
A Dadc_sync.rst6 A reference signal with a known voltage level is quantified into equally
8 possible with the bit resolution supported by the ADC. The input voltage
10 closest voltage level defines the digital value that can be used to represent
11 the analog input voltage level.
15 and the resulting digital value represents the relative voltage level between
16 V+ and V-. This means that if the input voltage level on V+ is lower than on
19 against the reference voltage, and the resulting digital value can only be
27 conversion range is from 0V to the reference voltage.
36 external with difference voltage levels. The reference voltage have an impact
38 input signal and never less than the expected maximum input voltage.
/bsp/microchip/saml10/bsp/hal/documentation/
A Dadc_sync.rst6 A reference signal with a known voltage level is quantified into equally
8 possible with the bit resolution supported by the ADC. The input voltage
10 closest voltage level defines the digital value that can be used to represent
11 the analog input voltage level.
15 and the resulting digital value represents the relative voltage level between
16 V+ and V-. This means that if the input voltage level on V+ is lower than on
19 against the reference voltage, and the resulting digital value can only be
27 conversion range is from 0V to the reference voltage.
36 external with difference voltage levels. The reference voltage have an impact
38 input signal and never less than the expected maximum input voltage.
/bsp/microchip/same70/bsp/hal/documentation/
A Dadc_sync.rst6 A reference signal with a known voltage level is quantified into equally
8 possible with the bit resolution supported by the ADC. The input voltage
10 closest voltage level defines the digital value that can be used to represent
11 the analog input voltage level.
15 and the resulting digital value represents the relative voltage level between
16 V+ and V-. This means that if the input voltage level on V+ is lower than on
19 against the reference voltage, and the resulting digital value can only be
27 conversion range is from 0V to the reference voltage.
36 external with difference voltage levels. The reference voltage have an impact
38 input signal and never less than the expected maximum input voltage.
/bsp/microchip/same54/bsp/hal/documentation/
A Dadc_sync.rst6 A reference signal with a known voltage level is quantified into equally
8 possible with the bit resolution supported by the ADC. The input voltage
10 closest voltage level defines the digital value that can be used to represent
11 the analog input voltage level.
15 and the resulting digital value represents the relative voltage level between
16 V+ and V-. This means that if the input voltage level on V+ is lower than on
19 against the reference voltage, and the resulting digital value can only be
27 conversion range is from 0V to the reference voltage.
36 external with difference voltage levels. The reference voltage have an impact
38 input signal and never less than the expected maximum input voltage.
/bsp/core-v-mcu/Libraries/core_v_hal_libraries/core_v_hal/include/
A Dhal_fll_pi.h126 static inline int pi_fll_soc_max_freq_at_V(int voltage) in pi_fll_soc_max_freq_at_V() argument
128 return (FLL_SOC_MIN_FREQUENCY + (voltage - DCDC_DEFAULT_LV) * FLL_SOC_FV_SLOPE); in pi_fll_soc_max_freq_at_V()
138 static inline int pi_fll_cluster_max_freq_at_V(int voltage) in pi_fll_cluster_max_freq_at_V() argument
140 return (FLL_CLUSTER_MIN_FREQUENCY + (voltage - DCDC_DEFAULT_LV) * FLL_CLUSTER_FV_SLOPE); in pi_fll_cluster_max_freq_at_V()
/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6700/HPM6750/
A Dhpm_pcfg_drv.h576 uint16_t voltage; in pcfg_dcdc_switch_to_dcm_mode() local
583 voltage = PCFG_DCDC_MODE_VOLT_GET(ptr->DCDC_MODE); in pcfg_dcdc_switch_to_dcm_mode()
584 voltage = (voltage - 600) / 25; in pcfg_dcdc_switch_to_dcm_mode()
585 …FG_DCDC_ADVPARAM_MIN_DUT_MASK) | PCFG_DCDC_ADVPARAM_MIN_DUT_SET(pcfc_dcdc_min_duty_cycle[voltage]); in pcfg_dcdc_switch_to_dcm_mode()
A Dhpm_bcfg_drv.h73 static inline void bcfg_ldo_set_voltage(BCFG_Type *ptr, uint16_t voltage) in bcfg_ldo_set_voltage() argument
75 ptr->LDO_CFG = (ptr->LDO_CFG & ~(BCFG_LDO_CFG_VOLT_MASK)) | BCFG_LDO_CFG_VOLT_SET(voltage); in bcfg_ldo_set_voltage()
/bsp/stm32/stm32l053-st-nucleo/
A DREADME.md9 … with a large choice of internal and external clock sources, an internal voltage adaptation and se…
13 …r has a built-in LCD voltage generator that allows to drive up to 8 multiplexed LCDs with contrast…
40 - Programmable voltage detector (PVD)
/bsp/stm32/stm32g431-st-nucleo/
A DREADME.md13 …l amplifiers, four DAC channels (2 external and 2 internal), an internal voltage reference buffer,…
30 - VDD, VDDA voltage range: 1.71 V to 3.6 V
40 - Programmable voltage detector (PVD)
60 - Internal voltage reference buffer (VREFBUF) supporting three output voltages (2.048 V, 2.5 V, 2.9…
/bsp/stm32/stm32g491-st-nucleo/
A DREADME.md13 …l amplifiers, four DAC channels (2 external and 2 internal), an internal voltage reference buffer,…
30 - VDD, VDDA voltage range: 1.71 V to 3.6 V
40 - Programmable voltage detector (PVD)
60 - Internal voltage reference buffer (VREFBUF) supporting three output voltages (2.048 V, 2.5 V, 2.9…
/bsp/stm32/stm32g474-st-nucleo/
A DREADME.md11 … amplifiers, seven DAC channels (3 external and 4 internal), an internal voltage reference buffer,…
28 - VDD, VDDA voltage range: 1.71 V to 3.6 V
40 - Programmable voltage detector (PVD)
59 - Internal voltage reference buffer (VREFBUF) supporting three output voltages (2.048 V, 2.5 V, 2.9…
/bsp/n32/libraries/N32L43x_Firmware_Library/n32l43x_std_periph_driver/src/
A Dn32l43x_pwr.c141 void PWR_MRconfig(uint8_t voltage) in PWR_MRconfig() argument
148 tmpreg |= (uint32_t)(voltage << 9); in PWR_MRconfig()
/bsp/n32/libraries/N32L40x_Firmware_Library/n32l40x_std_periph_driver/src/
A Dn32l40x_pwr.c140 void PWR_MRconfig(uint8_t voltage) in PWR_MRconfig() argument
148 tmpreg |= (uint32_t)(voltage << 9); in PWR_MRconfig()
/bsp/allwinner/libraries/sunxi-hal/hal/source/usb/manager/
A Dsunxi_usb_board.h102 unsigned int voltage; /* usb port number(?) */ member
/bsp/n32/libraries/N32G43x_Firmware_Library/n32g43x_std_periph_driver/src/
A Dn32g43x_pwr.c140 void PWR_MRconfig(uint8_t voltage) in PWR_MRconfig() argument
148 tmpreg |= (uint32_t)(voltage << 9); in PWR_MRconfig()
/bsp/hc32/tests/
A Dtest_dac.c111 MSH_CMD_EXPORT(dac_vol_sample, dac voltage convert sample < dac1 | dac2 value >);
/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6800/HPM6880/
A Dhpm_pcfg_drv.h566 static inline void pcfg_ddr_dcdc_set_voltage_output(PCFG_Type *ptr, uint8_t voltage) in pcfg_ddr_dcdc_set_voltage_output() argument
569 … | PCFG_DCDCM_MODE_VOLT_SET(voltage) | PCFG_DCDCM_MODE_MODE_SET(pcfg_dcdc_mode_basic); in pcfg_ddr_dcdc_set_voltage_output()
/bsp/microchip/same70/
A DREADME_zh.md54 - Single supply voltage from 3.0V to 3.6V for Qualification AEC - Q100 Grade 2 Devices
55 - Single Supply voltage from 1.7V to 3.6V for Industrial Temperature Devices
A DREADME.md54 - Single supply voltage from 3.0V to 3.6V for Qualification AEC - Q100 Grade 2 Devices
55 - Single Supply voltage from 1.7V to 3.6V for Industrial Temperature Devices
/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/
A Dab32vg1_hal_sd.c186 bool sdmmc_acmd_op_cond(sd_handle_t hsd, uint32_t voltage) in sdmmc_acmd_op_cond() argument
191 if (sdio_send_cmd(hsd->instance, 41 | RSP_3, voltage, &(hsd->sdcard.abend))) { in sdmmc_acmd_op_cond()
/bsp/n32/libraries/N32L43x_Firmware_Library/n32l43x_std_periph_driver/inc/
A Dn32l43x_pwr.h206 void PWR_MRconfig(uint8_t voltage);
/bsp/n32/libraries/N32G43x_Firmware_Library/n32g43x_std_periph_driver/inc/
A Dn32g43x_pwr.h206 void PWR_MRconfig(uint8_t voltage);
/bsp/stm32/stm32g071-st-nucleo/
A DREADME.md9 …els, one 12-bit DAC with two channels, two fast comparators, an internal voltage reference buffer,…
26 - Programmable voltage detector (PVD)
/bsp/n32/libraries/N32L40x_Firmware_Library/n32l40x_std_periph_driver/inc/
A Dn32l40x_pwr.h208 void PWR_MRconfig(uint8_t voltage);

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