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Searched refs:wTmpReg (Results 1 – 4 of 4) sorted by relevance

/bsp/ht32/libraries/HT32_STD_5xxxx_FWLib/library/HT32F5xxxx_Driver/src/
A Dht32f5xxxx_mctm.c147 u32 wTmpReg; in MCTM_CHBRKCTRConfig() local
159 wTmpReg = MCTMx->CHBRKCTR & 0x00000010; // Keep CHMOE in MCTM_CHBRKCTRConfig()
160 wTmpReg |= (u32)CHBRKCTRInit->BreakFilter << 8; in MCTM_CHBRKCTRConfig()
161 wTmpReg |= (u32)CHBRKCTRInit->DeadTime << 24; in MCTM_CHBRKCTRConfig()
162 wTmpReg |= CHBRKCTRInit->LockLevel | CHBRKCTRInit->OSSRState | CHBRKCTRInit->OSSIState; in MCTM_CHBRKCTRConfig()
163 wTmpReg |= CHBRKCTRInit->Break0 | CHBRKCTRInit->Break0Polarity | CHBRKCTRInit->AutomaticOutput; in MCTM_CHBRKCTRConfig()
165 MCTMx->CHBRKCTR = wTmpReg; in MCTM_CHBRKCTRConfig()
177 u32 wTmpReg; in MCTM_CHBRKCTRConfig2() local
179 wTmpReg = MCTMx->CHBRKCTR & 0x00000010; // Keep CHMOE in MCTM_CHBRKCTRConfig2()
181 wTmpReg |= CHBRKCTRInit->Reg; in MCTM_CHBRKCTRConfig2()
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A Dht32f5xxxx_tm.c228 u32 wTmpReg; in TM_OutputInit() local
276 wTmpReg = TMx->CHPOLR & wTmpMask; in TM_OutputInit()
280 wTmpReg |= (u32)(OutInit->Polarity | (OutInit->PolarityN << 1)) << bChPos; in TM_OutputInit()
285 wTmpReg |= (u32)(OutInit->Polarity) << bChPos; in TM_OutputInit()
288 TMx->CHPOLR = wTmpReg; in TM_OutputInit()
294 wTmpReg = TMx->CHBRKCFR & wTmpMask; in TM_OutputInit()
295 wTmpReg |= (u32)(OutInit->IdleState | (OutInit->IdleStateN << 1)) << bChPos; in TM_OutputInit()
296 TMx->CHBRKCFR = wTmpReg; in TM_OutputInit()
/bsp/ht32/libraries/HT32_STD_1xxxx_FWLib/library/HT32F1xxxx_Driver/src/
A Dht32f1xxxx_mctm.c147 u32 wTmpReg; in MCTM_CHBRKCTRConfig() local
161 wTmpReg = MCTMx->CHBRKCTR & 0x00000010; // Keep CHMOE in MCTM_CHBRKCTRConfig()
162 wTmpReg |= (u32)CHBRKCTRInit->BreakFilter << 8; in MCTM_CHBRKCTRConfig()
163 wTmpReg |= (u32)CHBRKCTRInit->DeadTime << 24; in MCTM_CHBRKCTRConfig()
164 wTmpReg |= CHBRKCTRInit->LockLevel | CHBRKCTRInit->OSSRState | CHBRKCTRInit->OSSIState; in MCTM_CHBRKCTRConfig()
165 wTmpReg |= CHBRKCTRInit->Break0 | CHBRKCTRInit->Break0Polarity | CHBRKCTRInit->AutomaticOutput; in MCTM_CHBRKCTRConfig()
166 wTmpReg |= (CHBRKCTRInit->Break1 << 2) | (CHBRKCTRInit->Break1Polarity << 2); in MCTM_CHBRKCTRConfig()
168 MCTMx->CHBRKCTR = wTmpReg; in MCTM_CHBRKCTRConfig()
A Dht32f1xxxx_tm.c198 u32 wTmpReg; in TM_OutputInit() local
238 wTmpReg = TMx->CHPOLR & wTmpMask; in TM_OutputInit()
242 wTmpReg |= (u32)(OutInit->Polarity | (OutInit->PolarityN << 1)) << bChPos; in TM_OutputInit()
246 wTmpReg |= (u32)(OutInit->Polarity) << bChPos; in TM_OutputInit()
249 TMx->CHPOLR = wTmpReg; in TM_OutputInit()
254 wTmpReg = TMx->CHBRKCFR & wTmpMask; in TM_OutputInit()
255 wTmpReg |= (u32)(OutInit->IdleState | (OutInit->IdleStateN << 1)) << bChPos; in TM_OutputInit()
256 TMx->CHBRKCFR = wTmpReg; in TM_OutputInit()

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