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Searched refs:PCIR_CACHELNSZ (Results 1 – 3 of 3) sorted by relevance

/components/drivers/pci/
A Dpci_regs.h88 #define PCIR_CACHELNSZ 0x0c macro
A Dpci.c713 rt_pci_write_config_u8(pdev, PCIR_CACHELNSZ, RT_PCI_CACHE_LINE_SIZE); in rt_pci_device_alloc_resource()
/components/drivers/pci/host/dw/
A Dpcie-dw_ep.c187 dw_pcie_writeb_dbi(pci, func_offset + PCIR_CACHELNSZ, hdr->cache_line_size); in dw_pcie_ep_write_header()

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