PORT_LOGIC_LINK_WIDTH_2_LANES (reference) in projects: components

Searched refs:PORT_LOGIC_LINK_WIDTH_2_LANES (Results 1 – 2 of 2) sorted by relevance

/components/drivers/pci/host/dw/
A D	pcie-dw.h	`62 #define PORT_LOGIC_LINK_WIDTH_2_LANES PORT_LOGIC_LINK_WIDTH(0x2) macro`
A D	pcie-dw.c	`639 case 2: val \|= PORT_LOGIC_LINK_WIDTH_2_LANES; break; in dw_pcie_setup()`

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