Searched refs:clk_mul (Results 1 – 2 of 2) sorted by relevance
2307 int real_div = div, clk_mul = 1; in rt_sdhci_clk_set() local2324 clk_mul = host->clk_mul; in rt_sdhci_clk_set()2333 if (host->clk_mul) in rt_sdhci_clk_set()2337 if ((host->max_clk * host->clk_mul / div) in rt_sdhci_clk_set()2346 clk_mul = host->clk_mul; in rt_sdhci_clk_set()2356 if (!host->clk_mul || switch_base_clk) in rt_sdhci_clk_set()2389 *actual_clock = (host->max_clk * clk_mul) / real_div; in rt_sdhci_clk_set()2653 if (host->clk_mul) in rt_sdhci_setup_host()2654 host->clk_mul += 1; in rt_sdhci_setup_host()2662 if (host->clk_mul) in rt_sdhci_setup_host()[all …]
454 unsigned int clk_mul; /* Clock Muliplier value */ member
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