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Searched refs:reg (Results 1 – 25 of 28) sorted by relevance

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/components/drivers/include/drivers/
A Dregulator.h80 rt_err_t (*enable)(struct rt_regulator_node *reg);
81 rt_err_t (*disable)(struct rt_regulator_node *reg);
82 rt_bool_t (*is_enabled)(struct rt_regulator_node *reg);
84 int (*get_voltage)(struct rt_regulator_node *reg);
86 rt_int32_t (*get_mode)(struct rt_regulator_node *reg);
129 void rt_regulator_put(struct rt_regulator *reg);
131 rt_err_t rt_regulator_enable(struct rt_regulator *reg);
132 rt_err_t rt_regulator_disable(struct rt_regulator *reg);
133 rt_bool_t rt_regulator_is_enabled(struct rt_regulator *reg);
137 int rt_regulator_get_voltage(struct rt_regulator *reg);
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A Dpci.h363 rt_uint32_t devfn, int reg, rt_uint8_t value);
365 rt_uint32_t devfn, int reg, rt_uint16_t value);
367 rt_uint32_t devfn, int reg, rt_uint32_t value);
372 rt_uint32_t devfn, int reg, int width, rt_uint32_t value);
377 rt_uint32_t devfn, int reg, int width, rt_uint32_t value);
380 int reg, rt_uint8_t *value) in rt_pci_read_config_u8() argument
386 int reg, rt_uint16_t *value) in rt_pci_read_config_u16() argument
392 int reg, rt_uint32_t *value) in rt_pci_read_config_u32() argument
398 int reg, rt_uint8_t value) in rt_pci_write_config_u8() argument
404 int reg, rt_uint16_t value) in rt_pci_write_config_u16() argument
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A Dphy.h103 int (*read)(struct rt_phy_device *phydev, int addr, int devad, int reg);
104 int (*write)(struct rt_phy_device *phydev, int addr, int devad, int reg,
106 int (*read_mmd)(struct rt_phy_device *phydev, int devad, int reg);
107 int (*write_mmd)(struct rt_phy_device *phydev, int devad, int reg,
162 rt_size_t (*read)(void *bus, rt_uint32_t addr, rt_uint32_t reg, void *data, rt_uint32_t size);
163 rt_size_t (*write)(void *bus, rt_uint32_t addr, rt_uint32_t reg, void *data, rt_uint32_t size);
195 rt_uint32_t reg; member
212 rt_phy_status (*read)(rt_phy_t *phy, rt_uint32_t reg, rt_uint32_t *data);
213 rt_phy_status (*write)(rt_phy_t *phy, rt_uint32_t reg, rt_uint32_t data);
A Ddev_sdio.h178 rt_uint32_t reg,
181 rt_uint32_t reg,
/components/mm/
A Dmm_memblock.c109 rt_memcpy(&(new_reg->memreg), reg, sizeof(*reg)); in _reg_insert_after()
205 err = _reg_insert_after(reg, &new_region, reg->flags); in _memblock_separate_range()
221 err = _reg_insert_after(reg, &new_region, reg->flags); in _memblock_separate_range()
333 reg->flags == _next_region(reg)->flags && in _memblock_merge_memory()
334 reg->memreg.end == _next_region(reg)->memreg.start) in _memblock_merge_memory()
336 reg->memreg.end = _next_region(reg)->memreg.end; in _memblock_merge_memory()
373 for_each_free_region(m, r, MEMBLOCK_NONE, &reg.start, &reg.end) in rt_memblock_setup_memory_environment()
375 reg.start = RT_ALIGN(reg.start, ARCH_PAGE_SIZE); in rt_memblock_setup_memory_environment()
376 reg.end = RT_ALIGN_DOWN(reg.end, ARCH_PAGE_SIZE); in rt_memblock_setup_memory_environment()
378 if (reg.start >= reg.end) in rt_memblock_setup_memory_environment()
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A Dmm_page.c1144 void rt_page_init(rt_region_t reg) in rt_page_init() argument
1151 _init_region.region_area = reg; in rt_page_init()
1159 reg.start += ARCH_PAGE_MASK; in rt_page_init()
1160 reg.start &= ~ARCH_PAGE_MASK; in rt_page_init()
1161 reg.end &= ~ARCH_PAGE_MASK; in rt_page_init()
1162 if (reg.end <= reg.start) in rt_page_init()
1164 LOG_E("region end(%p) must greater than start(%p)", reg.start, reg.end); in rt_page_init()
1168 shadow.start = reg.start & ~shadow_mask; in rt_page_init()
1169 shadow.end = CEIL(reg.end, shadow_mask + 1); in rt_page_init()
1171 reg.end, page_nr); in rt_page_init()
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A Dmm_page.h76 void rt_page_init(rt_region_t reg);
/components/drivers/regulator/
A Dregulator.c260 if (!reg) in rt_regulator_enable()
310 if (!reg) in rt_regulator_disable()
338 if (!reg) in rt_regulator_is_enabled()
345 return reg->reg_np->ops->is_enabled(reg->reg_np); in rt_regulator_is_enabled()
407 if (!reg) in rt_regulator_set_voltage()
426 if (!reg) in rt_regulator_get_voltage()
454 if (!reg) in rt_regulator_set_mode()
482 if (!reg) in rt_regulator_get_mode()
598 reg = rt_calloc(1, sizeof(*reg)); in rt_regulator_get()
600 if (!reg) in rt_regulator_get()
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/components/drivers/pci/
A Daccess.c33 err = bus->ops->read(bus, devfn, reg, sizeof(type), &data); \
45 err = bus->ops->write(bus, devfn, reg, sizeof(type), value); \
63 rt_uint32_t devfn, int reg, int width, rt_uint32_t *value) in PCI_OPS()
67 if ((base = bus->ops->map(bus, devfn, reg))) in PCI_OPS()
89 rt_uint32_t devfn, int reg, int width, rt_uint32_t value) in rt_pci_bus_write_config_uxx() argument
93 if ((base = bus->ops->map(bus, devfn, reg))) in rt_pci_bus_write_config_uxx()
115 rt_uint32_t devfn, int reg, int width, rt_uint32_t *value) in rt_pci_bus_read_config_generic_u32() argument
119 if ((base = bus->ops->map(bus, devfn, reg))) in rt_pci_bus_read_config_generic_u32()
135 rt_uint32_t devfn, int reg, int width, rt_uint32_t value) in rt_pci_bus_write_config_generic_u32() argument
139 if ((base = bus->ops->map(bus, devfn, reg & ~0x3))) in rt_pci_bus_write_config_generic_u32()
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A Dofw.c531 rt_uint32_t reg[5]; in ofw_pci_devfn() local
533 res = rt_ofw_prop_read_u32_array_index(np, "reg", 0, RT_ARRAY_SIZE(reg), reg); in ofw_pci_devfn()
535 return res > 0 ? ((reg[0] >> 8) & 0xff) : res; in ofw_pci_devfn()
A Dpci_regs.h603 #define PCIM_EA_SEC_NR(reg) ((reg) & 0xff) argument
604 #define PCIM_EA_SUB_NR(reg) (((reg) >> 8) & 0xff) argument
/components/drivers/pci/host/dw/
A Dpcie-dw.h333 dw_pcie_write_dbi(pci, reg, 0x4, val); in dw_pcie_writel_dbi()
338 return dw_pcie_read_dbi(pci, reg, 0x4); in dw_pcie_readl_dbi()
343 dw_pcie_write_dbi(pci, reg, 0x2, val); in dw_pcie_writew_dbi()
348 return dw_pcie_read_dbi(pci, reg, 0x2); in dw_pcie_readw_dbi()
353 dw_pcie_write_dbi(pci, reg, 0x1, val); in dw_pcie_writeb_dbi()
358 return dw_pcie_read_dbi(pci, reg, 0x1); in dw_pcie_readb_dbi()
363 dw_pcie_write_dbi2(pci, reg, 0x4, val); in dw_pcie_writel_dbi2()
372 dw_pcie_writel_dbi(pci, reg, dw_pcie_readl_dbi(pci, reg) | PCIE_DBI_RO_WR_EN); in dw_pcie_dbi_ro_writable_enable()
376 dw_pcie_writel_dbi(pci, reg, dw_pcie_readl_dbi(pci, reg) & ~PCIE_DBI_RO_WR_EN); in dw_pcie_dbi_ro_writable_enable()
386 rt_uint32_t index, rt_uint32_t reg) in dw_pcie_readl_ob_unroll() argument
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A Dpcie-dw_ep.c47 rt_uint32_t reg; in __dw_pcie_ep_reset_bar() local
81 rt_uint16_t reg; in __dw_pcie_ep_find_next_cap() local
92 cap_id = (reg & 0x00ff); in __dw_pcie_ep_find_next_cap()
111 rt_uint16_t reg; in dw_pcie_ep_find_capability() local
117 next_cap_ptr = reg & 0x00ff; in dw_pcie_ep_find_capability()
218 rt_uint32_t reg; in dw_pcie_ep_set_bar() local
317 rt_uint32_t val, reg; in dw_pcie_ep_set_msi() local
346 rt_uint32_t val, reg; in dw_pcie_ep_get_msi() local
375 rt_uint32_t val, reg; in dw_pcie_ep_set_msix() local
413 rt_uint32_t val, reg; in dw_pcie_ep_get_msix() local
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A Dpcie-dw.c20 rt_uint16_t reg; in __dw_pcie_find_next_cap() local
28 reg = dw_pcie_readw_dbi(pci, cap_ptr); in __dw_pcie_find_next_cap()
29 cap_id = (reg & 0x00ff); in __dw_pcie_find_next_cap()
41 next_cap_ptr = (reg & 0xff00) >> 8; in __dw_pcie_find_next_cap()
47 rt_uint16_t reg; in dw_pcie_find_capability() local
50 reg = dw_pcie_readw_dbi(pci, PCIR_CAP_PTR); in dw_pcie_find_capability()
51 next_cap_ptr = (reg & 0x00ff); in dw_pcie_find_capability()
173 if ((err = dw_pcie_read(pci->dbi_base + reg, size, &val))) in dw_pcie_read_dbi()
223 if ((err = dw_pcie_read(pci->atu_base + reg, 4, &val))) in dw_pcie_readl_atu()
237 pci->ops->write_dbi(pci, pci->atu_base, reg, 4, val); in dw_pcie_writel_atu()
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A Dpcie-dw_host.c434 static void *dw_pcie_other_conf_map(struct rt_pci_bus *bus, rt_uint32_t devfn, int reg) in dw_pcie_other_conf_map() argument
467 return port->cfg0_base + reg; in dw_pcie_other_conf_map()
471 rt_uint32_t devfn, int reg, int width, rt_uint32_t *value) in dw_pcie_other_read_conf() argument
477 err = rt_pci_bus_read_config_uxx(bus, devfn, reg, width, value); in dw_pcie_other_read_conf()
489 rt_uint32_t devfn, int reg, int width, rt_uint32_t value) in dw_pcie_other_write_conf() argument
495 err = rt_pci_bus_write_config_uxx(bus, devfn, reg, width, value); in dw_pcie_other_write_conf()
513 void *dw_pcie_own_conf_map(struct rt_pci_bus *bus, rt_uint32_t devfn, int reg) in dw_pcie_own_conf_map() argument
523 return pci->dbi_base + reg; in dw_pcie_own_conf_map()
/components/drivers/phy/
A Dmdio.h80 int (*read)(struct mii_bus* bus, int addr, int devad, int reg);
81 int (*write)(struct mii_bus* bus, int addr, int devad, int reg, rt_uint16_t val);
83 int (*read_c45)(struct mii_bus* bus, int addr, int devad, int reg);
85 int (*write_c45)(struct mii_bus* bus, int addr, int devad, int reg, rt_uint16_t val);
A Dphy.c24 return phy->bus->ops->read(phy->bus, phy->addr, msg->reg, &(msg->value), 4); in phy_device_read()
30 return phy->bus->ops->write(phy->bus, phy->addr, msg->reg, &(msg->value), 4); in phy_device_write()
227 int reg; in rt_phy_reset() local
240 reg = rt_phy_read(phydev, devad, RT_MII_BMCR); in rt_phy_reset()
241 while ((reg & RT_BMCR_RESET) && timeout--) in rt_phy_reset()
243 reg = rt_phy_read(phydev, devad, RT_MII_BMCR); in rt_phy_reset()
245 if (reg < 0) in rt_phy_reset()
253 if (reg & RT_BMCR_RESET) in rt_phy_reset()
/components/drivers/sdio/sdhci/include/
A Dsdhci.h574 static inline void rt_sdhci_writel(struct rt_sdhci_host *host, rt_uint32_t val, int reg) in rt_sdhci_writel() argument
576 writel(val, host->ioaddr + reg); in rt_sdhci_writel()
581 writew(val, host->ioaddr + reg); in rt_sdhci_writew()
584 static inline void rt_sdhci_writeb(struct rt_sdhci_host *host, rt_uint8_t val, int reg) in rt_sdhci_writeb() argument
586 writeb(val, host->ioaddr + reg); in rt_sdhci_writeb()
589 static inline rt_uint32_t rt_sdhci_readl(struct rt_sdhci_host *host, int reg) in rt_sdhci_readl() argument
591 return readl(host->ioaddr + reg); in rt_sdhci_readl()
594 static inline rt_uint16_t rt_sdhci_readw(struct rt_sdhci_host *host, int reg) in rt_sdhci_readw() argument
596 return readw(host->ioaddr + reg); in rt_sdhci_readw()
599 static inline rt_uint8_t rt_sdhci_readb(struct rt_sdhci_host *host, int reg) in rt_sdhci_readb() argument
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/components/drivers/reset/
A Dreset-simple.c24 rt_uint32_t reg; in reset_simple_update() local
32 reg = HWREG32(rsts->mmio_base + (bank * reg_width)); in reset_simple_update()
36 reg |= RT_BIT(offset); in reset_simple_update()
40 reg &= ~RT_BIT(offset); in reset_simple_update()
43 HWREG32(rsts->mmio_base + (bank * reg_width)) = reg; in reset_simple_update()
/components/drivers/pic/
A Dpic-gicv3.h258 #define GITS_BASER_CACHEABILITY(reg, inner_outer, type) \ argument
259 (GIC_BASER_CACHE_##type << reg##_##inner_outer##_CACHEABILITY_SHIFT)
260 #define GITS_BASER_SHAREABILITY(reg, type) \ argument
261 (GIC_BASER_##type << reg##_SHAREABILITY_SHIFT)
320 #define read_gicreg(reg, out) rt_hw_sysreg_read(reg, out) argument
321 #define write_gicreg(reg, in) rt_hw_sysreg_write(reg, in) argument
/components/drivers/sdio/
A Ddev_sdio.c1104 rt_uint8_t reg; in sdio_attach_irq() local
1125 reg |= 1 << func->num; in sdio_attach_irq()
1145 rt_uint8_t reg; in sdio_detach_irq() local
1165 reg &= ~(1 << func->num); in sdio_detach_irq()
1168 if (!(reg & 0xFE)) in sdio_detach_irq()
1169 reg = 0; in sdio_detach_irq()
1189 rt_uint8_t reg; in sdio_enable_func() local
1204 reg |= 1 << func->num; in sdio_enable_func()
1217 if (reg & (1 << func->num)) in sdio_enable_func()
1236 rt_uint8_t reg; in sdio_disable_func() local
[all …]
/components/drivers/ofw/
A Dfdt.c328 const fdt32_t *reg, *endptr; in fdt_scan_memory() local
342 reg = fdt_getprop(_fdt, nodeoffset, "reg", &len); in fdt_scan_memory()
344 if (!reg) in fdt_scan_memory()
349 endptr = reg + (len / sizeof(fdt32_t)); in fdt_scan_memory()
352 while ((endptr - reg) >= (_root_addr_cells + _root_size_cells)) in fdt_scan_memory()
354 base = rt_fdt_next_cell(&reg, _root_addr_cells); in fdt_scan_memory()
355 size = rt_fdt_next_cell(&reg, _root_size_cells); in fdt_scan_memory()
671 const fdt32_t *reg; in rt_fdt_scan_chosen_stdout() local
674 if ((reg = fdt_getprop(_fdt, offset, "reg", RT_NULL))) in rt_fdt_scan_chosen_stdout()
680 address = rt_fdt_read_number(reg, addr_cells); in rt_fdt_scan_chosen_stdout()
[all …]
/components/drivers/usb/cherryusb/port/musb/
A Dusb_glue_bk.c212 reg = REG_USB_USR_70C; in bk_analog_layer_usb_sys_related_ops()
213 if(reg & 0x100){ in bk_analog_layer_usb_sys_related_ops()
218 USB_DRIVER_LOGI("70c_reg:0x%x\r\n", reg); in bk_analog_layer_usb_sys_related_ops()
/components/drivers/sensor/v1/
A Dsensor_cmd.c480 rt_uint8_t reg = 0xFF; in sensor() local
497 rt_device_control(dev, RT_SENSOR_CTRL_GET_ID, &reg); in sensor()
498 LOG_I("device id: 0x%x!", reg); in sensor()
/components/drivers/sensor/v2/
A Dsensor_cmd.c668 rt_uint8_t reg = 0xFF; in sensor() local
688 if (rt_device_control(new_dev, RT_SENSOR_CTRL_GET_ID, &reg) == RT_EOK) in sensor()
690 rt_kprintf("Sensor Chip ID: %#x\n", reg); in sensor()

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