1 /* 2 * Copyright : (C) 2024 Phytium Information Technology, Inc. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Modify History: 7 * Ver Who Date Changes 8 * ----- ------ -------- -------------------------------------- 9 * 1.0 zhugengyu 2024/6/26 first commit 10 */ 11 #ifndef CHERRYUSB_CONFIG_H 12 #define CHERRYUSB_CONFIG_H 13 14 #include "rtconfig.h" 15 #include <rtthread.h> 16 17 /* ================ USB common Configuration ================ */ 18 19 #define CONFIG_USB_PRINTF(...) rt_kprintf(__VA_ARGS__) 20 21 void *usb_sys_mem_malloc(size_t size); 22 void usb_sys_mem_free(void *ptr); 23 void *usb_sys_malloc_align(size_t align, size_t size); 24 25 #define usb_malloc(size) usb_sys_mem_malloc(size) 26 #define usb_free(ptr) usb_sys_mem_free(ptr) 27 #define usb_align(align, size) usb_sys_malloc_align(align, size) 28 29 unsigned long usb_hc_get_register_base(uint32_t id); 30 unsigned long usb_dc_get_register_base(uint32_t id); 31 32 #define CONFIG_USB_DBG_LEVEL USB_DBG_ERROR 33 34 /* Enable print with color */ 35 #define CONFIG_USB_PRINTF_COLOR_ENABLE 36 37 /* data align size when use dma */ 38 #ifndef CONFIG_USB_ALIGN_SIZE 39 #define CONFIG_USB_ALIGN_SIZE 4 40 #endif 41 42 /* attribute data into no cache ram */ 43 #define USB_NOCACHE_RAM_SECTION __attribute__((section(".noncacheable"))) 44 45 /* ================= USB Device Stack Configuration ================ */ 46 47 /* Ep0 in and out transfer buffer */ 48 #ifndef CONFIG_USBDEV_REQUEST_BUFFER_LEN 49 #define CONFIG_USBDEV_REQUEST_BUFFER_LEN 512 50 #endif 51 52 /* Setup packet log for debug */ 53 // #define CONFIG_USBDEV_SETUP_LOG_PRINT 54 55 /* Send ep0 in data from user buffer instead of copying into ep0 reqdata 56 * Please note that user buffer must be aligned with CONFIG_USB_ALIGN_SIZE 57 */ 58 // #define CONFIG_USBDEV_EP0_INDATA_NO_COPY 59 60 /* Check if the input descriptor is correct */ 61 // #define CONFIG_USBDEV_DESC_CHECK 62 63 /* Enable test mode */ 64 // #define CONFIG_USBDEV_TEST_MODE 65 66 #ifndef CONFIG_USBDEV_MSC_MAX_LUN 67 #define CONFIG_USBDEV_MSC_MAX_LUN 1 68 #endif 69 70 #ifndef CONFIG_USBDEV_MSC_MAX_BUFSIZE 71 #define CONFIG_USBDEV_MSC_MAX_BUFSIZE 4096 72 #endif 73 74 #ifndef CONFIG_USBDEV_MSC_MANUFACTURER_STRING 75 #define CONFIG_USBDEV_MSC_MANUFACTURER_STRING "" 76 #endif 77 78 #ifndef CONFIG_USBDEV_MSC_PRODUCT_STRING 79 #define CONFIG_USBDEV_MSC_PRODUCT_STRING "" 80 #endif 81 82 #ifndef CONFIG_USBDEV_MSC_VERSION_STRING 83 #define CONFIG_USBDEV_MSC_VERSION_STRING "0.01" 84 #endif 85 86 // #define CONFIG_USBDEV_MSC_THREAD 87 88 #ifndef CONFIG_USBDEV_MSC_PRIO 89 #define CONFIG_USBDEV_MSC_PRIO 4 90 #endif 91 92 #ifndef CONFIG_USBDEV_MSC_STACKSIZE 93 #define CONFIG_USBDEV_MSC_STACKSIZE 8192 94 #endif 95 96 #ifndef CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE 97 #define CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE 156 98 #endif 99 100 /* rndis transfer buffer size, must be a multiple of (1536 + 44)*/ 101 #ifndef CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE 102 #define CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE 1580 103 #endif 104 105 #ifndef CONFIG_USBDEV_RNDIS_VENDOR_ID 106 #define CONFIG_USBDEV_RNDIS_VENDOR_ID 0x0000ffff 107 #endif 108 109 #ifndef CONFIG_USBDEV_RNDIS_VENDOR_DESC 110 #define CONFIG_USBDEV_RNDIS_VENDOR_DESC "CherryUSB" 111 #endif 112 113 #define CONFIG_USBDEV_RNDIS_USING_LWIP 114 115 /* ================ USB HOST Stack Configuration ================== */ 116 117 #define CONFIG_USBHOST_MAX_RHPORTS 1 118 #define CONFIG_USBHOST_MAX_EXTHUBS 0 119 #define CONFIG_USBHOST_MAX_EHPORTS 8 120 #define CONFIG_USBHOST_MAX_INTERFACES 8 121 #define CONFIG_USBHOST_MAX_INTF_ALTSETTINGS 8 122 #define CONFIG_USBHOST_MAX_ENDPOINTS 8 123 124 #define CONFIG_USBHOST_MAX_CDC_ACM_CLASS 4 125 #define CONFIG_USBHOST_MAX_HID_CLASS 4 126 #define CONFIG_USBHOST_MAX_MSC_CLASS 2 127 #define CONFIG_USBHOST_MAX_AUDIO_CLASS 1 128 #define CONFIG_USBHOST_MAX_VIDEO_CLASS 1 129 130 #define CONFIG_USBHOST_DEV_NAMELEN 16 131 132 #ifndef CONFIG_USBHOST_PSC_PRIO 133 #define CONFIG_USBHOST_PSC_PRIO 0 134 #endif 135 #ifndef CONFIG_USBHOST_PSC_STACKSIZE 136 #define CONFIG_USBHOST_PSC_STACKSIZE 8192 137 #endif 138 139 //#define CONFIG_USBHOST_GET_STRING_DESC 140 141 // #define CONFIG_USBHOST_MSOS_ENABLE 142 #ifndef CONFIG_USBHOST_MSOS_VENDOR_CODE 143 #define CONFIG_USBHOST_MSOS_VENDOR_CODE 0x00 144 #endif 145 146 /* Ep0 max transfer buffer */ 147 #ifndef CONFIG_USBHOST_REQUEST_BUFFER_LEN 148 #define CONFIG_USBHOST_REQUEST_BUFFER_LEN 512 149 #endif 150 151 #ifndef CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT 152 #define CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT 500 153 #endif 154 155 #ifndef CONFIG_USBHOST_MSC_TIMEOUT 156 #define CONFIG_USBHOST_MSC_TIMEOUT 5000 157 #endif 158 159 /* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size, 160 * you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow. 161 */ 162 #ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE 163 #define CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE (2048) 164 #endif 165 166 /* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */ 167 #ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE 168 #define CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE (2048) 169 #endif 170 171 /* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size, 172 * you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow. 173 */ 174 #ifndef CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE 175 #define CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE (2048) 176 #endif 177 /* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */ 178 #ifndef CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE 179 #define CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE (2048) 180 #endif 181 182 /* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size, 183 * you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow. 184 */ 185 #ifndef CONFIG_USBHOST_ASIX_ETH_MAX_RX_SIZE 186 #define CONFIG_USBHOST_ASIX_ETH_MAX_RX_SIZE (2048) 187 #endif 188 /* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */ 189 #ifndef CONFIG_USBHOST_ASIX_ETH_MAX_TX_SIZE 190 #define CONFIG_USBHOST_ASIX_ETH_MAX_TX_SIZE (2048) 191 #endif 192 193 /* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size, 194 * you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow. 195 */ 196 #ifndef CONFIG_USBHOST_RTL8152_ETH_MAX_RX_SIZE 197 #define CONFIG_USBHOST_RTL8152_ETH_MAX_RX_SIZE (2048) 198 #endif 199 /* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */ 200 #ifndef CONFIG_USBHOST_RTL8152_ETH_MAX_TX_SIZE 201 #define CONFIG_USBHOST_RTL8152_ETH_MAX_TX_SIZE (2048) 202 #endif 203 204 #define CONFIG_USBHOST_BLUETOOTH_HCI_H4 205 // #define CONFIG_USBHOST_BLUETOOTH_HCI_LOG 206 207 #ifndef CONFIG_USBHOST_BLUETOOTH_TX_SIZE 208 #define CONFIG_USBHOST_BLUETOOTH_TX_SIZE 2048 209 #endif 210 #ifndef CONFIG_USBHOST_BLUETOOTH_RX_SIZE 211 #define CONFIG_USBHOST_BLUETOOTH_RX_SIZE 2048 212 #endif 213 214 /* ================ USB Device Port Configuration ================*/ 215 216 #ifndef CONFIG_USBDEV_MAX_BUS 217 #define CONFIG_USBDEV_MAX_BUS 1 // for now, bus num must be 1 except hpm ip 218 #endif 219 220 #ifndef CONFIG_USBDEV_EP_NUM 221 #define CONFIG_USBDEV_EP_NUM 8 222 #endif 223 224 /* ---------------- FSDEV Configuration ---------------- */ 225 //#define CONFIG_USBDEV_FSDEV_PMA_ACCESS 2 // maybe 1 or 2, many chips may have a difference 226 227 /* ---------------- DWC2 Configuration ---------------- */ 228 /* (5 * number of control endpoints + 8) + ((largest USB packet used / 4) + 1 for 229 * status information) + (2 * number of OUT endpoints) + 1 for Global NAK 230 */ 231 // #define CONFIG_USB_DWC2_RXALL_FIFO_SIZE (1024 / 4) 232 /* IN Endpoints Max packet Size / 4 */ 233 // #define CONFIG_USB_DWC2_TX0_FIFO_SIZE (64 / 4) 234 // #define CONFIG_USB_DWC2_TX1_FIFO_SIZE (512 / 4) 235 // #define CONFIG_USB_DWC2_TX2_FIFO_SIZE (64 / 4) 236 // #define CONFIG_USB_DWC2_TX3_FIFO_SIZE (64 / 4) 237 // #define CONFIG_USB_DWC2_TX4_FIFO_SIZE (0 / 4) 238 // #define CONFIG_USB_DWC2_TX5_FIFO_SIZE (0 / 4) 239 // #define CONFIG_USB_DWC2_TX6_FIFO_SIZE (0 / 4) 240 // #define CONFIG_USB_DWC2_TX7_FIFO_SIZE (0 / 4) 241 // #define CONFIG_USB_DWC2_TX8_FIFO_SIZE (0 / 4) 242 243 /* ---------------- MUSB Configuration ---------------- */ 244 // #define CONFIG_USB_MUSB_SUNXI 245 246 /* ================ USB Host Port Configuration ==================*/ 247 #ifndef CONFIG_INPUT_MOUSE_WHEEL 248 #define CONFIG_INPUT_MOUSE_WHEEL 249 #endif 250 251 #ifndef CONFIG_USBHOST_MAX_BUS 252 #define CONFIG_USBHOST_MAX_BUS 3 253 #endif 254 255 #ifndef CONFIG_USBHOST_PIPE_NUM 256 #define CONFIG_USBHOST_PIPE_NUM 10 257 #endif 258 259 /* ---------------- XHCI Configuration ---------------- */ 260 #define CONFIG_USB_XHCI_HCCR_OFFSET (0x0) 261 262 /* ---------------- PUSB2 Configuration ---------------- */ 263 #define CONFIG_USB_PUSB2_BUS_NUM 3U 264 #define CONFIG_USB_PUSB2_BUS_ID 0U 265 266 #endif 267