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Searched refs:ARCH_PAGE_TBL_MASK (Results 1 – 5 of 5) sorted by relevance

/libcpu/mips/gs264/
A Dmmu.c282 mmu_l2 = (size_t *)((*mmu_l1 & ~ARCH_PAGE_TBL_MASK) - mmu_info->pv_off); in find_vaddr()
347 mmu_l2 = (size_t *)((*mmu_l1 & ~ARCH_PAGE_TBL_MASK) - mmu_info->pv_off); in check_vaddr()
384 mmu_l2 = (size_t *)((*mmu_l1 & ~ARCH_PAGE_TBL_MASK) - mmu_info->pv_off); in __rt_hw_mmu_unmap()
437 mmu_l2 = (size_t *)((*mmu_l1 & ~ARCH_PAGE_TBL_MASK) - mmu_info->pv_off); in __rt_hw_mmu_map()
581 mmu_l2 = (size_t *)((*mmu_l1 & ~ARCH_PAGE_TBL_MASK) - mmu_info->pv_off); in __rt_hw_mmu_map_auto()
764 mmu_l2 = (size_t *)((tmp & ~ARCH_PAGE_TBL_MASK) - mmu_info->pv_off); in _rt_hw_mmu_v2p()
A Dmmu.h83 #define ARCH_PAGE_TBL_MASK (ARCH_PAGE_TBL_SIZE - 1) macro
/libcpu/arm/cortex-a/
A Dmmu.c289 mmu_l2 = (size_t *)((*mmu_l1 & ~ARCH_PAGE_TBL_MASK) - PV_OFFSET); in _kenrel_unmap_4K()
325 mmu_l2 = (size_t *)((*mmu_l1 & ~ARCH_PAGE_TBL_MASK) - PV_OFFSET); in _kenrel_map_4K()
447 mmu_l2 = (size_t *)((tmp & ~ARCH_PAGE_TBL_MASK) - PV_OFFSET); in rt_hw_mmu_v2p()
A Dmmu.h89 #define ARCH_PAGE_TBL_MASK (ARCH_PAGE_TBL_SIZE - 1) macro
/libcpu/aarch64/common/include/
A Dmmu.h86 #define ARCH_PAGE_TBL_MASK (ARCH_PAGE_TBL_SIZE - 1) macro

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