Searched refs:CP0_STATUS (Results 1 – 4 of 4) sorted by relevance
| /libcpu/mips/common/ |
| A D | entry_gcc.S | 35 MTC0 zero, CP0_STATUS # Set CPU to disable interrupt.
40 MTC0 t0, CP0_STATUS
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| A D | stackframe.h | 24 MFC0 v1, CP0_STATUS
28 MTC0 v1, CP0_STATUS
99 MFC0 v1, CP0_STATUS
129 MFC0 v1, CP0_STATUS
133 MTC0 v1, CP0_STATUS
199 mfc0 a0, CP0_STATUS
202 mtc0 a0, CP0_STATUS
211 mtc0 v0, CP0_STATUS
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| A D | mips_regs.h | 175 #define CP0_STATUS $12 macro
1125 __BUILD_SET_C0(status,CP0_STATUS)
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| /libcpu/mips/pic32/ |
| A D | context_gcc.S | 29 mfc0 v0, CP0_STATUS /* v0 = status */
32 mtc0 v1, CP0_STATUS /* status = v1 */
41 mtc0 a0, CP0_STATUS
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