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Searched refs:CR (Results 1 – 5 of 5) sorted by relevance

/libcpu/ppc/ppc405/
A Dcontext.h40 #define CR (USPRG0 + 4) macro
41 #define XER (CR + 4)
A Dcontext_gcc.S87 stw r0,CR(r1)
118 lwz r0,CR(r1) /* restore cr */
A Dstart_gcc.S228 stw r0,CR(r1)
257 lwz r0,CR(r1) /* restore cr */
315 stw r0,CR(r1)
344 lwz r0,CR(r1) /* restore cr */
/libcpu/arm/cortex-a/
A Dgicv3.h17 #define __get_gicv3_reg(CR, Rt) __asm__ volatile("MRC " CR \ argument
21 #define __set_gicv3_reg(CR, Rt) __asm__ volatile("MCR " CR \ argument
/libcpu/arm/cortex-r52/
A Dgicv3.h17 #define __get_gicv3_reg(CR, Rt) __asm volatile("MRC " CR \ argument
21 #define __set_gicv3_reg(CR, Rt) __asm volatile("MCR " CR \ argument

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