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Searched refs:GIC_DIST_PENDING_CLEAR (Results 1 – 10 of 10) sorted by relevance

/libcpu/arm/realview-a8-vmm/
A Dgic.c41 #define GIC_DIST_PENDING_CLEAR(hw_base, n) __REG32((hw_base) + 0x280 + ((n)/32) * 4) macro
99 GIC_DIST_PENDING_CLEAR(_gic_table[index].dist_hw_base, irq) = mask; in arm_gic_clear_pending()
/libcpu/aarch64/common/
A Dgic.c52 #define GIC_DIST_PENDING_CLEAR(hw_base, n) __REG32((hw_base) + 0x280U + ((n)/32U) * 4U) macro
85 GIC_DIST_PENDING_CLEAR(_gic_table[index].dist_hw_base, irq) = mask; in arm_gic_ack()
175 GIC_DIST_PENDING_CLEAR(_gic_table[index].dist_hw_base, irq) = mask; in arm_gic_clear_pending_irq()
A Dgicv3.c173 GIC_DIST_PENDING_CLEAR(_gic_table[index].dist_hw_base, irq) = mask; in arm_gic_clear_pending_irq()
658 GIC_DIST_PENDING_CLEAR(dist_base, i) = 0xffffffff; in arm_gic_dist_init()
/libcpu/arm/cortex-a/
A Dgic.c50 #define GIC_DIST_PENDING_CLEAR(hw_base, n) __REG32((hw_base) + 0x280U + ((n)/32U) * 4U) macro
83 GIC_DIST_PENDING_CLEAR(_gic_table[index].dist_hw_base, irq) = mask; in arm_gic_ack()
173 GIC_DIST_PENDING_CLEAR(_gic_table[index].dist_hw_base, irq) = mask; in arm_gic_clear_pending_irq()
A Dgicv3.h94 #define GIC_DIST_PENDING_CLEAR(hw_base, n) __REG32((hw_base) + 0x280U + ((n)/32U) * 4U) macro
A Dgicv3.c181 GIC_DIST_PENDING_CLEAR(_gic_table[index].dist_hw_base, irq) = mask; in arm_gic_clear_pending_irq()
539 GIC_DIST_PENDING_CLEAR(dist_base, i) = 0xffffffffU; in arm_gic_dist_init()
/libcpu/arm/zynqmp-r5/
A Dgic.c42 #define GIC_DIST_PENDING_CLEAR(hw_base, n) __REG32((hw_base) + 0x280 + ((n)/32) * 4) macro
/libcpu/arm/cortex-r52/
A Dgicv3.c180 GIC_DIST_PENDING_CLEAR(_gic_table[index].dist_hw_base, irq) = mask; in arm_gic_clear_pending_irq()
505 GIC_DIST_PENDING_CLEAR(dist_base, i) = 0xffffffffU; in arm_gic_dist_init()
A Dgicv3.h94 #define GIC_DIST_PENDING_CLEAR(hw_base, n) __REG32((hw_base) + 0x280U + ((n)/32U) * 4U) macro
/libcpu/aarch64/common/include/
A Dgicv3.h93 #define GIC_DIST_PENDING_CLEAR(hw_base, n) HWREG32((hw_base) + 0x280U + ((n) / 32U) * 4U) macro

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