Searched refs:GIC_DIST_PENDING_SET (Results 1 – 10 of 10) sorted by relevance
| /libcpu/aarch64/common/ |
| A D | gic.c | 51 #define GIC_DIST_PENDING_SET(hw_base, n) __REG32((hw_base) + 0x200U + ((n)/32U) * 4U) macro
124 pend = (GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, irq) >> (irq % 32U)) & 0x1UL; in arm_gic_get_pending_irq()
153 GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, irq) = 1U << (irq % 32U); in arm_gic_set_pending_irq()
314 pending = (GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, irq) >> (irq % 32U)) & 0x1UL; in arm_gic_get_irq_status()
497 GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, in arm_gic_dump()
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| A D | gicv3.c | 122 pend = (GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, irq) >> (irq % 32)) & 0x1; in arm_gic_get_pending_irq()
151 GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, irq) = 1 << (irq % 32); in arm_gic_set_pending_irq()
381 pending = (GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, irq) >> (irq % 32)) & 0x1; in arm_gic_get_irq_status()
804 rt_kprintf("0x%08x, ", GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, i * 32)); in arm_gic_dump()
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| /libcpu/arm/cortex-a/ |
| A D | gic.c | 49 #define GIC_DIST_PENDING_SET(hw_base, n) __REG32((hw_base) + 0x200U + ((n)/32U) * 4U) macro
122 pend = (GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, irq) >> (irq % 32U)) & 0x1UL; in arm_gic_get_pending_irq()
151 GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, irq) = 1U << (irq % 32U); in arm_gic_set_pending_irq()
312 pending = (GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, irq) >> (irq % 32U)) & 0x1UL; in arm_gic_get_irq_status()
478 GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, in arm_gic_dump()
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| A D | gicv3.c | 130 pend = (GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, irq) >> (irq % 32U)) & 0x1UL; in arm_gic_get_pending_irq()
159 GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, irq) = 1U << (irq % 32U); in arm_gic_set_pending_irq()
373 pending = (GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, irq) >> (irq % 32U)) & 0x1UL; in arm_gic_get_irq_status()
688 GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, in arm_gic_dump()
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| A D | gicv3.h | 93 #define GIC_DIST_PENDING_SET(hw_base, n) __REG32((hw_base) + 0x200U + ((n)/32U) * 4U) macro
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| /libcpu/arm/cortex-r52/ |
| A D | gicv3.c | 129 pend = (GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, irq) >> (irq % 32U)) & 0x1UL; in arm_gic_get_pending_irq()
158 GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, irq) = 1U << (irq % 32U); in arm_gic_set_pending_irq()
373 pending = (GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, irq) >> (irq % 32U)) & 0x1UL; in arm_gic_get_irq_status()
663 GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, in arm_gic_dump()
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| A D | gicv3.h | 93 #define GIC_DIST_PENDING_SET(hw_base, n) __REG32((hw_base) + 0x200U + ((n)/32U) * 4U) macro
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| /libcpu/arm/realview-a8-vmm/ |
| A D | gic.c | 40 #define GIC_DIST_PENDING_SET(hw_base, n) __REG32((hw_base) + 0x200 + ((n)/32) * 4) macro
173 GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, in arm_gic_dump()
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| /libcpu/arm/zynqmp-r5/ |
| A D | gic.c | 41 #define GIC_DIST_PENDING_SET(hw_base, n) __REG32((hw_base) + 0x200 + ((n)/32) * 4) macro
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| /libcpu/aarch64/common/include/ |
| A D | gicv3.h | 92 #define GIC_DIST_PENDING_SET(hw_base, n) HWREG32((hw_base) + 0x200U + ((n) / 32U) * 4U) macro
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