Searched refs:GIC_DIST_PRI (Results 1 – 10 of 10) sorted by relevance
| /libcpu/aarch64/common/ |
| A D | gic.c | 55 #define GIC_DIST_PRI(hw_base, n) __REG32((hw_base) + 0x400U + ((n)/4U) * 4U) macro
262 mask = GIC_DIST_PRI(_gic_table[index].dist_hw_base, irq); in arm_gic_set_priority()
265 GIC_DIST_PRI(_gic_table[index].dist_hw_base, irq) = mask; in arm_gic_set_priority()
275 return (GIC_DIST_PRI(_gic_table[index].dist_hw_base, irq) >> ((irq % 4U) * 8U)) & 0xFFUL; in arm_gic_get_priority()
422 GIC_DIST_PRI(dist_base, i) = 0xa0a0a0a0U; in arm_gic_dist_init()
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| A D | gicv3.c | 291 mask = GIC_DIST_PRI(_gic_table[index].dist_hw_base, irq); in arm_gic_set_priority()
294 GIC_DIST_PRI(_gic_table[index].dist_hw_base, irq) = mask; in arm_gic_set_priority()
313 return (GIC_DIST_PRI(_gic_table[index].dist_hw_base, irq) >> ((irq % 4) * 8)) & 0xff; in arm_gic_get_priority()
651 GIC_DIST_PRI(dist_base, i) = 0xa0a0a0a0; in arm_gic_dist_init()
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| /libcpu/arm/cortex-a/ |
| A D | gic.c | 53 #define GIC_DIST_PRI(hw_base, n) __REG32((hw_base) + 0x400U + ((n)/4U) * 4U) macro
260 mask = GIC_DIST_PRI(_gic_table[index].dist_hw_base, irq); in arm_gic_set_priority()
263 GIC_DIST_PRI(_gic_table[index].dist_hw_base, irq) = mask; in arm_gic_set_priority()
273 return (GIC_DIST_PRI(_gic_table[index].dist_hw_base, irq) >> ((irq % 4U) * 8U)) & 0xFFUL; in arm_gic_get_priority()
410 GIC_DIST_PRI(dist_base, i) = 0xa0a0a0a0U; in arm_gic_dist_init()
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| A D | gicv3.c | 280 mask = GIC_DIST_PRI(_gic_table[index].dist_hw_base, irq); in arm_gic_set_priority()
283 GIC_DIST_PRI(_gic_table[index].dist_hw_base, irq) = mask; in arm_gic_set_priority()
303 return (GIC_DIST_PRI(_gic_table[index].dist_hw_base, irq) >> ((irq % 4U) * 8U)) & 0xFFUL; in arm_gic_get_priority()
533 GIC_DIST_PRI(dist_base, i) = 0xa0a0a0a0U; in arm_gic_dist_init()
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| A D | gicv3.h | 97 #define GIC_DIST_PRI(hw_base, n) __REG32((hw_base) + 0x400U + ((n)/4U) * 4U) macro
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| /libcpu/arm/zynqmp-r5/ |
| A D | gic.c | 44 #define GIC_DIST_PRI(hw_base, n) __REG32((hw_base) + 0x400 + ((n)/4) * 4) macro
170 GIC_DIST_PRI(dist_base, i) = 0xa0a0a0a0; in arm_gic_dist_init()
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| /libcpu/arm/cortex-r52/ |
| A D | gicv3.c | 279 mask = GIC_DIST_PRI(_gic_table[index].dist_hw_base, irq); in arm_gic_set_priority()
282 GIC_DIST_PRI(_gic_table[index].dist_hw_base, irq) = mask; in arm_gic_set_priority()
302 return (GIC_DIST_PRI(_gic_table[index].dist_hw_base, irq) >> ((irq % 4U) * 8U)) & 0xFFUL; in arm_gic_get_priority()
499 GIC_DIST_PRI(dist_base, i) = 0xa0a0a0a0U; in arm_gic_dist_init()
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| A D | gicv3.h | 97 #define GIC_DIST_PRI(hw_base, n) __REG32((hw_base) + 0x400U + ((n)/4U) * 4U) macro
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| /libcpu/arm/realview-a8-vmm/ |
| A D | gic.c | 44 #define GIC_DIST_PRI(hw_base, n) __REG32((hw_base) + 0x400 + ((n)/4) * 4) macro
236 GIC_DIST_PRI(dist_base, i) = 0xa0a0a0a0; in arm_gic_dist_init()
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| /libcpu/aarch64/common/include/ |
| A D | gicv3.h | 96 #define GIC_DIST_PRI(hw_base, n) HWREG32((hw_base) + 0x400U + ((n) / 4U) * 4U) macro
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