Searched refs:GIC_DIST_TARGET (Results 1 – 10 of 10) sorted by relevance
| /libcpu/arm/zynqmp-r5/ |
| A D | gic.c | 45 #define GIC_DIST_TARGET(hw_base, n) __REG32((hw_base) + 0x800 + ((n)/4) * 4) macro
98 old_tgt = GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq); in arm_gic_set_cpu()
103 GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq) = old_tgt; in arm_gic_set_cpu()
166 GIC_DIST_TARGET(dist_base, i) = cpumask; in arm_gic_dist_init()
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| /libcpu/arm/realview-a8-vmm/ |
| A D | gic.c | 45 #define GIC_DIST_TARGET(hw_base, n) __REG32((hw_base) + 0x800 + ((n)/4) * 4) macro
123 old_tgt = GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq); in arm_gic_set_cpu()
128 GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq) = old_tgt; in arm_gic_set_cpu()
232 GIC_DIST_TARGET(dist_base, i) = cpumask; in arm_gic_dist_init()
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| /libcpu/aarch64/common/ |
| A D | gic.c | 56 #define GIC_DIST_TARGET(hw_base, n) __REG32((hw_base) + 0x800U + ((n)/4U) * 4U) macro
235 old_tgt = GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq); in arm_gic_set_cpu()
240 GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq) = old_tgt; in arm_gic_set_cpu()
250 return (GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq) >> ((irq % 4U) * 8U)) & 0xFFUL; in arm_gic_get_target_cpu()
416 GIC_DIST_TARGET(dist_base, i) = cpumask; in arm_gic_dist_init()
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| A D | gicv3.c | 253 old_tgt = GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq); in arm_gic_set_cpu()
258 GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq) = old_tgt; in arm_gic_set_cpu()
268 return (GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq) >> ((irq % 4) * 8)) & 0xff; in arm_gic_get_target_cpu()
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| /libcpu/arm/cortex-a/ |
| A D | gic.c | 54 #define GIC_DIST_TARGET(hw_base, n) __REG32((hw_base) + 0x800U + ((n)/4U) * 4U) macro
233 old_tgt = GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq); in arm_gic_set_cpu()
238 GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq) = old_tgt; in arm_gic_set_cpu()
248 return (GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq) >> ((irq % 4U) * 8U)) & 0xFFUL; in arm_gic_get_target_cpu()
406 GIC_DIST_TARGET(dist_base, i) = cpumask; in arm_gic_dist_init()
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| A D | gicv3.c | 241 old_tgt = GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq); in arm_gic_set_cpu()
246 GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq) = old_tgt; in arm_gic_set_cpu()
256 return (GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq) >> ((irq % 4U) * 8U)) & 0xFFUL; in arm_gic_get_target_cpu()
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| A D | gicv3.h | 98 #define GIC_DIST_TARGET(hw_base, n) __REG32((hw_base) + 0x800U + ((n)/4U) * 4U) macro
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| /libcpu/arm/cortex-r52/ |
| A D | gicv3.c | 240 old_tgt = GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq); in arm_gic_set_cpu()
245 GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq) = old_tgt; in arm_gic_set_cpu()
255 return (GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq) >> ((irq % 4U) * 8U)) & 0xFFUL; in arm_gic_get_target_cpu()
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| A D | gicv3.h | 98 #define GIC_DIST_TARGET(hw_base, n) __REG32((hw_base) + 0x800U + ((n)/4U) * 4U) macro
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| /libcpu/aarch64/common/include/ |
| A D | gicv3.h | 97 #define GIC_DIST_TARGET(hw_base, n) HWREG32((hw_base) + 0x800U + ((n) / 4U) * 4U) macro
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