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Searched refs:GIC_RDISTSGI_ICFGR1 (Results 1 – 6 of 6) sorted by relevance

/libcpu/arm/cortex-a/
A Dgicv3.h134 #define GIC_RDISTSGI_ICFGR1(hw_base) __REG32((hw_base) + GIC_RSGI_OFFSET + 0xC04U) macro
A Dgicv3.c618 GIC_RDISTSGI_ICFGR1(base) = 0x0U; // PPI is level-sensitive. in arm_gic_redist_init()
/libcpu/arm/cortex-r52/
A Dgicv3.h134 #define GIC_RDISTSGI_ICFGR1(hw_base) __REG32((hw_base) + GIC_RSGI_OFFSET + 0xC04U) macro
A Dgicv3.c586 GIC_RDISTSGI_ICFGR1(base) = 0x0U; // PPI is level-sensitive. in arm_gic_redist_init()
/libcpu/aarch64/common/include/
A Dgicv3.h131 #define GIC_RDISTSGI_ICFGR1(hw_base) HWREG32((hw_base) + GIC_RSGI_OFFSET + 0xC04U) macro
/libcpu/aarch64/common/
A Dgicv3.c734 GIC_RDISTSGI_ICFGR1(redist_base) = 0; in arm_gic_redist_init()

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