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Searched refs:GIC_RDISTSGI_ISENABLER0 (Results 1 – 6 of 6) sorted by relevance

/libcpu/arm/cortex-a/
A Dgicv3.h126 #define GIC_RDISTSGI_ISENABLER0(hw_base) __REG32((hw_base) + GIC_RSGI_OFFSET + 0x100U) macro
A Dgicv3.c111 GIC_RDISTSGI_ISENABLER0(_gic_table[index].redist_hw_base[cpu_id]) = mask; in arm_gic_umask()
/libcpu/arm/cortex-r52/
A Dgicv3.h126 #define GIC_RDISTSGI_ISENABLER0(hw_base) __REG32((hw_base) + GIC_RSGI_OFFSET + 0x100U) macro
A Dgicv3.c110 GIC_RDISTSGI_ISENABLER0(_gic_table[index].redist_hw_base[cpu_id]) = mask; in arm_gic_umask()
/libcpu/aarch64/common/include/
A Dgicv3.h123 #define GIC_RDISTSGI_ISENABLER0(hw_base) HWREG32((hw_base) + GIC_RSGI_OFFSET + 0x100U) macro
/libcpu/aarch64/common/
A Dgicv3.c103 GIC_RDISTSGI_ISENABLER0(_gic_table[index].redist_hw_base[cpu_id]) = mask; in arm_gic_umask()
838 rt_kprintf("0x%08x\n", GIC_RDISTSGI_ISENABLER0(_gic_table[index].redist_hw_base[cpu_id])); in arm_gic_sgi_dump()

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