| /libcpu/arm/cortex-m0/ |
| A D | context_gcc.S | 67 STR R0, [R2]
75 STR R1, [R0]
91 LDR R1, [R0]
97 STR R1, [R0]
107 LDR R0, [R0]
140 RSBS R0, R0, #0x00
141 BX R0
154 MOVS R0, #0
159 MOVS R0, #1
175 LDR R0, [R0]
[all …]
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| /libcpu/arm/cortex-m23/ |
| A D | context_gcc.S | 68 STR R0, [R2]
76 STR R1, [R0]
92 LDR R1, [R0]
98 STR R1, [R0]
108 LDR R0, [R0]
141 RSBS R0, R0, #0x00
142 BX R0
155 MOVS R0, #0
160 MOVS R0, #1
176 LDR R0, [R0]
[all …]
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| /libcpu/arm/cortex-m3/ |
| A D | context_gcc.S | 68 STR R0, [R2]
76 STR R1, [R0]
92 LDR R1, [R0]
97 STR R1, [R0]
100 LDR R1, [R0]
105 LDR R0, [R0]
131 STR R0, [R1]
135 MOV R0, #0
136 STR R0, [R1]
140 MOV R0, #1
[all …]
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| /libcpu/arm/arm926/ |
| A D | start_rvds.S | 113 MRS R0,CPSR
114 BIC R0,R0,#MODEMASK
115 ORR R0,R0,#MODE_SVC:OR:NOINT
122 BIC R0, R0, R1
129 BLX R0
134 BIC R0, R0, #MODEMASK
162 BLX R0
181 STMIA SP, {R0 - R12} ; Calling R0-R12
188 MOV R0, SP
202 STMIA SP, {R0 - R12} ; Calling R0-R12
[all …]
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| A D | start_iar.S | 123 MRS R0, CPSR
124 BIC R0, R0, #MODEMASK
125 ORR R0, R0, #MODE_SVC|NOINT
132 BIC R0, R0, R1
139 BLX R0
144 BIC R0, R0, #MODEMASK
172 BLX R0
193 STMIA SP, {R0 - R12} ; Calling R0-R12
200 MOV R0, SP
211 STMIA SP, {R0 - R12} ; Calling R0-R12
[all …]
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| A D | context_gcc.S | 19 MRS R0, CPSR
20 ORR R1, R0, #NOINT
29 MSR CPSR, R0
40 STMFD SP!, {R0-R12, LR} @; push lr & register file
43 STR SP, [R0] @; store sp in preempted tasks tcb
47 LDMFD SP!, {R0-R12, LR, PC}^ @; pop new task r0-r12, lr & pc
55 LDR SP, [R0] @; get new task stack pointer
58 LDMFD SP!, {R0-R12, LR, PC}^ @; pop new task r0-r12, lr & pc
75 STR R0, [R2]
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| A D | context_iar.S | 20 MRS R0, CPSR
21 ORR R1, R0, #NOINT
30 MSR CPSR_CXSF, R0
41 STMFD SP!, {R0-R12, LR} ; push lr & register file
44 STR SP, [R0] ; store sp in preempted tasks TCB
48 LDMFD SP!, {R0-R12, LR, PC}^ ; pop new task r0-r12, lr & pc
56 LDR SP, [R0] ; get new task stack pointer
59 LDMFD SP!, {R0-R12, LR, PC}^ ; pop new task r0-r12, lr & pc
76 STR R0, [R2]
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| A D | context_rvds.S | 23 MRS R0, CPSR
24 ORR R1, R0, #NOINT
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| /libcpu/arm/s3c24x0/ |
| A D | start_rvds.S | 1064 MOV SP, R0
1065 SUB R0, R0, #UND_Stack_Size
1069 MOV SP, R0
1070 SUB R0, R0, #ABT_Stack_Size
1074 MOV SP, R0
1075 SUB R0, R0, #FIQ_Stack_Size
1079 MOV SP, R0
1080 SUB R0, R0, #IRQ_Stack_Size
1084 MOV SP, R0
1085 SUB R0, R0, #SVC_Stack_Size
[all …]
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| /libcpu/arm/lpc214x/ |
| A D | start_rvds.S | 375 MOV SP, R0
376 SUB R0, R0, #UND_Stack_Size
380 MOV SP, R0
381 SUB R0, R0, #ABT_Stack_Size
385 MOV SP, R0
386 SUB R0, R0, #FIQ_Stack_Size
390 MOV SP, R0
391 SUB R0, R0, #IRQ_Stack_Size
395 MOV SP, R0
396 ; SUB R0, R0, #SVC_Stack_Size
[all …]
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| /libcpu/arm/lpc24xx/ |
| A D | start_rvds.S | 1518 MOV SP, R0
1519 SUB R0, R0, #UND_Stack_Size
1523 MOV SP, R0
1524 SUB R0, R0, #ABT_Stack_Size
1528 MOV SP, R0
1529 SUB R0, R0, #FIQ_Stack_Size
1533 MOV SP, R0
1534 SUB R0, R0, #IRQ_Stack_Size
1538 MOV SP, R0
1539 SUB R0, R0, #SVC_Stack_Size
[all …]
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| /libcpu/blackfin/bf53x/ |
| A D | context_vdsp.S | 26 CLI R0;
39 STI R0;
49 [ -- SP ] = R0;
107 R0 = 0; define
108 [ P1 ] = R0;
123 R0 = [ SP ++ ]; define
124 A1 = R0;
125 R0 = [ SP ++ ]; define
126 A1.x = R0.L;
128 A0 = R0;
[all …]
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| /libcpu/arm/AT91SAM7S/ |
| A D | start_rvds.S | 365 MOV SP, R0
366 SUB R0, R0, #UND_Stack_Size
370 MOV SP, R0
371 SUB R0, R0, #ABT_Stack_Size
375 MOV SP, R0
376 SUB R0, R0, #FIQ_Stack_Size
380 MOV SP, R0
381 SUB R0, R0, #IRQ_Stack_Size
385 MOV SP, R0
386 SUB R0, R0, #SVC_Stack_Size
[all …]
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| /libcpu/arm/AT91SAM7X/ |
| A D | start_rvds.S | 368 MOV SP, R0
369 ;SUB R0, R0, #UND_Stack_Size
373 MOV SP, R0
374 ;SUB R0, R0, #ABT_Stack_Size
378 MOV SP, R0
379 ;SUB R0, R0, #FIQ_Stack_Size
383 MOV SP, R0
384 ;SUB R0, R0, #IRQ_Stack_Size
388 MOV SP, R0
389 ; SUB R0, R0, #SVC_Stack_Size
[all …]
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| /libcpu/arm/cortex-m33/ |
| A D | syscall_iar.S | 39 STR R0, [R1] ;/* update return value */
56 LDR R0, [R1, #24]
57 LDRB R0, [R0, #-2]
60 CMP R0, #0x0
64 CMP R0, #0x1
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| A D | syscall_gcc.S | 32 STR R0, [R1] /* update return value */
50 LDR R0, [R1, #24]
51 LDRB R0, [R0, #-2]
54 CMP R0, #0x0
58 CMP R0, #0x1
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| A D | syscall_rvds.S | 35 STR R0, [R1] ; update return value
59 LDR R0, [R1, #24]
60 LDRB R0, [R0, #-2]
63 CMP R0, #0x0
67 CMP R0, #0x1
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| /libcpu/arm/s3c44b0/ |
| A D | start_rvds.S | 938 MOV SP, R0
939 SUB R0, R0, #UND_Stack_Size
943 MOV SP, R0
944 SUB R0, R0, #ABT_Stack_Size
948 MOV SP, R0
949 SUB R0, R0, #FIQ_Stack_Size
953 MOV SP, R0
954 SUB R0, R0, #IRQ_Stack_Size
958 MOV SP, R0
959 SUB R0, R0, #SVC_Stack_Size
[all …]
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| /libcpu/rx/ |
| A D | context_iar.S | 59 MOV.L [ R0 ], [ R15 ] ;PSW
60 MOV.L 4[ R0 ], 4[ R15 ];PC
61 MOV.L 8[ R0 ], 8[ R15 ] ;R15
62 ADD #12, R0
75 MOV.L R0, [ R15 ]
85 MOV.L [ R15 ], R0
109 MOV.L [ R0 ], [ R15 ] ;PSW
110 MOV.L 4[ R0 ], 4[ R15 ];PC
111 MOV.L 8[ R0 ], 8[ R15 ] ;R15
112 ADD #12, R0
[all …]
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| /libcpu/arm/sep4020/ |
| A D | start_rvds.S | 143 STR R1,[R0]
148 MRS R0, CPSR
149 BIC R0, R0, #MASK_MODE
150 ORR R0, R0, #MODE_SVC32
151 ORR R0, R0, #I_Bit
152 ORR R0, R0, #F_Bit
157 STR R1,[R0]
160 STR R1,[R0]
164 STR R1,[R0]
167 STR R1,[R0]
[all …]
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| /libcpu/arm/am335x/ |
| A D | context_iar.S | 20 MRS R0, CPSR
21 ORR R1, R0, #NOINT
30 MSR CPSR_CXSF, R0
41 STMFD SP!, {R0-R12, LR} ; push lr & register file
|
| /libcpu/m16c/m16c62p/ |
| A D | context_iar.asm | 28 STC FLG, R0 ;fify 20100419
33 LDC R0, FLG ;fify 20100419
38 PUSHM R0,R1,R2,R3,A0,A1,SB,FB
45 POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore registers from the new task's stack
|
| A D | context_iar.S | 28 STC FLG, R0 ;fify 20100419
33 LDC R0, FLG ;fify 20100419
38 PUSHM R0,R1,R2,R3,A0,A1,SB,FB
45 POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore registers from the new task's stack
|
| A D | context_gcc.S | 20 PUSHM R0,R1,R2,R3,A0,A1,SB,FB
27 POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore registers from the new task's stack
|