| /libcpu/arm/cortex-m0/ |
| A D | context_gcc.S | 71 STR R1, [R2]
75 STR R1, [R0]
91 LDR R1, [R0]
92 CMP R1, #0x00
96 MOVS R1, #0
97 STR R1, [R0]
100 LDR R1, [R0]
119 LDR R1, [R1]
120 LDR R1, [R1] /* load thread stack pointer */
150 STR R0, [R1]
[all …]
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| /libcpu/arm/cortex-m23/ |
| A D | context_gcc.S | 72 STR R1, [R2]
76 STR R1, [R0]
92 LDR R1, [R0]
93 CMP R1, #0x00
97 MOVS R1, #0
98 STR R1, [R0]
101 LDR R1, [R0]
120 LDR R1, [R1]
121 LDR R1, [R1] /* load thread stack pointer */
151 STR R0, [R1]
[all …]
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| /libcpu/arm/cortex-m3/ |
| A D | context_gcc.S | 72 STR R1, [R2]
76 STR R1, [R0]
92 LDR R1, [R0]
96 MOV R1, #0
97 STR R1, [R0]
100 LDR R1, [R0]
110 LDR R1, [R1]
111 LDR R1, [R1] /* load thread stack pointer */
131 STR R0, [R1]
136 STR R0, [R1]
[all …]
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| /libcpu/arm/s3c24x0/ |
| A D | start_rvds.S | 907 LDR R1, =WTCON_Val
975 LDR R1, =GPACON_Val
981 LDR R1, =GPBCON_Val
983 LDR R1, =GPBUP_Val
991 LDR R1, =GPCUP_Val
999 LDR R1, =GPDUP_Val
1007 LDR R1, =GPEUP_Val
1015 LDR R1, =GPFUP_Val
1023 LDR R1, =GPGUP_Val
1031 LDR R1, =GPHUP_Val
[all …]
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| /libcpu/arm/cortex-m33/ |
| A D | syscall_iar.S | 33 PUSH {R1, R4, LR}
34 MOV R4, R1 ;/* copy thread SP to R4 */
38 POP {R1, R4, LR}
39 STR R0, [R1] ;/* update return value */
49 MRS R1, MSP ;/* get fault context from handler. */
52 MRS R1, PSP ;/* get fault context from thread. */
56 LDR R0, [R1, #24]
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| A D | syscall_gcc.S | 26 PUSH {R1, R4, LR}
27 MOV R4, R1 /* copy thread SP to R4 */
31 POP {R1, R4, LR}
32 STR R0, [R1] /* update return value */
43 MRS R1, MSP /* get fault context from handler. */
46 MRS R1, PSP /* get fault context from thread. */
50 LDR R0, [R1, #24]
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| A D | syscall_rvds.S | 29 PUSH {R1, R4, LR}
30 MOV R4, R1 ; copy thread SP to R4
34 POP {R1, R4, LR}
35 STR R0, [R1] ; update return value
51 ; get SP, save to R1
52 MRS R1, MSP ;get fault context from handler
55 MRS R1, PSP ;get fault context from thread
59 LDR R0, [R1, #24]
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| /libcpu/blackfin/bf53x/ |
| A D | context_vdsp.S | 52 [ -- SP ] = R1;
60 [ -- SP ] = R1;
79 R1.L = A0.x;
80 [ -- SP ] = R1;
81 R1 = A0.w; define
82 [ -- SP ] = R1;
83 R1.L = A1.x;
84 [ -- SP ] = R1;
85 R1 = A1.w; define
86 [ -- SP ] = R1;
[all …]
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| /libcpu/arm/lpc214x/ |
| A D | start_rvds.S | 274 STR R1, [R0]
283 LDR R1, =BCFG0_Val
288 LDR R1, =BCFG1_Val
293 LDR R1, =BCFG2_Val
298 LDR R1, =BCFG3_Val
309 STR R1, [R0]
316 MOV R1, #0xAA
355 MOV R1, #3
357 MOV R1, #2
359 MOV R1, #1
[all …]
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| /libcpu/arm/arm926/ |
| A D | start_iar.S | 132 BIC R0, R0, R1
146 ORR R1, R0, #MODE_UND|NOINT
147 MSR CPSR_cxsf, R1 ; Undef mode
150 ORR R1,R0,#MODE_ABT|NOINT
154 ORR R1,R0,#MODE_IRQ|NOINT
155 MSR CPSR_cxsf,R1 ; IRQ mode
158 ORR R1,R0,#MODE_FIQ|NOINT
159 MSR CPSR_cxsf,R1 ; FIQ mode
162 ORR R1,R0,#MODE_SYS|NOINT
166 ORR R1,R0,#MODE_SVC|NOINT
[all …]
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| A D | start_rvds.S | 122 BIC R0, R0, R1
136 ORR R1, R0, #MODE_UND:OR:NOINT
137 MSR CPSR_cxsf, R1 ; Undef mode
140 ORR R1,R0,#MODE_ABT:OR:NOINT
144 ORR R1,R0,#MODE_IRQ:OR:NOINT
145 MSR CPSR_cxsf,R1 ; IRQ mode
148 ORR R1,R0,#MODE_FIQ:OR:NOINT
149 MSR CPSR_cxsf,R1 ; FIQ mode
152 ORR R1,R0,#MODE_SYS:OR:NOINT
156 ORR R1,R0,#MODE_SVC:OR:NOINT
[all …]
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| A D | context_gcc.S | 20 ORR R1, R0, #NOINT
21 MSR CPSR_c, R1
44 LDR SP, [R1] @; get new task stack pointer
78 STR R1, [R2]
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| A D | context_iar.S | 21 ORR R1, R0, #NOINT
22 MSR CPSR_C, R1
45 LDR SP, [R1] ; get new task stack pointer
79 STR R1, [R2]
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| A D | context_rvds.S | 24 ORR R1, R0, #NOINT
25 MSR CPSR_C, R1
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| /libcpu/arm/AT91SAM7S/ |
| A D | start_rvds.S | 253 LDR R1, =RSTC_MR_Val
261 LDR R1, =EFC0_FMR_Val
268 LDR R1, =EFC1_FMR_Val
275 LDR R1, =WDT_MR_Val
276 STR R1, [R0, #WDT_MR]
285 LDR R1, =PMC_MOR_Val
297 LDR R1, =PMC_PLLR_Val
308 LDR R1, =PMC_MCKR_Val
309 AND R1, #PMC_CSS
321 AND R1, #PMC_PRES
[all …]
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| /libcpu/arm/AT91SAM7X/ |
| A D | start_rvds.S | 256 LDR R1, =RSTC_MR_Val
264 LDR R1, =EFC0_FMR_Val
271 LDR R1, =EFC1_FMR_Val
278 LDR R1, =WDT_MR_Val
279 STR R1, [R0, #WDT_MR]
288 LDR R1, =PMC_MOR_Val
300 LDR R1, =PMC_PLLR_Val
311 LDR R1, =PMC_MCKR_Val
312 AND R1, #PMC_CSS
324 AND R1, #PMC_PRES
[all …]
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| /libcpu/m16c/m16c62p/ |
| A D | context_gcc.S | 20 PUSHM R0,R1,R2,R3,A0,A1,SB,FB
27 POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore registers from the new task's stack
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| A D | context_iar.asm | 38 PUSHM R0,R1,R2,R3,A0,A1,SB,FB
45 POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore registers from the new task's stack
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| A D | context_iar.S | 38 PUSHM R0,R1,R2,R3,A0,A1,SB,FB
45 POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore registers from the new task's stack
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| /libcpu/arm/sep4020/ |
| A D | start_rvds.S | 142 LDR R1,=0x0
143 STR R1,[R0]
156 LDR R1,=0x0
157 STR R1,[R0]
159 LDR R1,=0xFFFFFFFF
160 STR R1,[R0]
163 LDR R1,=0x0
164 STR R1,[R0]
166 LDR R1,=0x0F
167 STR R1,[R0]
[all …]
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| /libcpu/arm/am335x/ |
| A D | context_iar.S | 21 ORR R1, R0, #NOINT
22 MSR CPSR_C, R1
|
| /libcpu/rx/ |
| A D | context_iar.S | 64 PUSHM R1-R14
92 POPM R1-R15
114 PUSHM R1-R14
125 MOV.L R0, R1
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| A D | cpuport.c | 37 rt_uint32_t R1; member
88 stack_frame->R1 = (unsigned long )parameter; /* r1 : parameter */ in rt_hw_stack_init()
110 rt_kprintf("r0: 0x%08x\n", exception_contex->R1); in rt_hw_hard_fault_exception()
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| /libcpu/arm/lpc24xx/ |
| A D | start_rvds.S | 1150 MOV R1, #0xAA
1219 MOV R1, #MAMTIM_Val
1221 MOV R1, #MAMCR_Val
1222 STR R1, [R0, #MAMCR_OFS]
1230 LDR R1, =SCB_BASE
1234 LDR R3, [R1, #PCONP_OFS]
1236 STR R4, [R1, #PCONP_OFS]
1502 MOV R1, #3
1504 MOV R1, #2
1506 MOV R1, #1
[all …]
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| /libcpu/arm/s3c44b0/ |
| A D | start_rvds.S | 855 STR R5, [R1]
871 STR R1, [R0, #PLLCON_OFS]
879 LDR R1, =WTCON_Val
883 STR R1, [R0, #WTCON_OFS]
897 STR R1, [R14, #PCONB_OFS]
1065 LDR R1, =(Stack_Mem + USR_Stack_Size)
|