Searched refs:UIC0_DCR_BASE (Results 1 – 2 of 2) sorted by relevance
11 #define UIC0_DCR_BASE 0xc0 macro25 #define uic0sr (UIC0_DCR_BASE+0x0) /* UIC0 status */26 #define uic0er (UIC0_DCR_BASE+0x2) /* UIC0 enable */27 #define uic0cr (UIC0_DCR_BASE+0x3) /* UIC0 critical */28 #define uic0pr (UIC0_DCR_BASE+0x4) /* UIC0 polarity */29 #define uic0tr (UIC0_DCR_BASE+0x5) /* UIC0 triggering */30 #define uic0msr (UIC0_DCR_BASE+0x6) /* UIC0 masked status */31 #define uic0vr (UIC0_DCR_BASE+0x7) /* UIC0 vector */32 #define uic0vcr (UIC0_DCR_BASE+0x8) /* UIC0 vector configuration */
125 uic_interrupt(UIC0_DCR_BASE, 0); in external_interrupt()
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