Home
last modified time | relevance | path

Searched refs:USTAT_RCV_READY (Results 1 – 6 of 6) sorted by relevance

/libcpu/arm/s3c44b0/
A Dserial.c21 #define USTAT_RCV_READY 0x01 /* receive data ready */ macro
29 while(UTRSTAT0 & USTAT_RCV_READY) tmp = URXH0; in serial_flush_input()
90 while ((UTRSTAT0 & USTAT_RCV_READY) == 0); in rt_serial_getc()
/libcpu/blackfin/bf53x/
A Dserial.h7 #define USTAT_RCV_READY 0x01 /* receive data ready */ macro
/libcpu/arm/sep4020/
A Dserial.h18 #define USTAT_RCV_READY 0x01 /* receive data ready */ macro
A Dserial.c134 while (uart->uart_device->lsr & USTAT_RCV_READY) in rt_serial_read()
258 while (uart->uart_device->lsr & USTAT_RCV_READY) in rt_hw_serial_isr()
/libcpu/unicore32/sep6200/
A Dserial.h19 #define USTAT_RCV_READY 0x01 /* receive data ready */ macro
A Dserial.c132 while (uart->uart_device->lsr & USTAT_RCV_READY) in rt_serial_read()
256 while (uart->uart_device->lsr & USTAT_RCV_READY) in rt_hw_serial_isr()

Completed in 6 milliseconds