XREG_CP15_CACHE_SIZE_ID (reference) in projects: libcpu

Searched refs:XREG_CP15_CACHE_SIZE_ID (Results 1 – 2 of 2) sorted by relevance

/libcpu/arm/zynqmp-r5/
A D	cache.c	`197 CsidReg = mfcp(XREG_CP15_CACHE_SIZE_ID); in Xil_DCacheFlush() 199 mfcp(XREG_CP15_CACHE_SIZE_ID, CsidReg); in Xil_DCacheFlush()`
A D	xreg_cortexr5.h	`206 #define XREG_CP15_CACHE_SIZE_ID "p15, 1, %0, c0, c0, 0" macro`

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