Searched refs:XREG_CP15_MPU_REG_SIZE_EN (Results 1 – 3 of 3) sorted by relevance
| /libcpu/arm/zynqmp-r5/ |
| A D | mpu.c | 250 mtcp(XREG_CP15_MPU_REG_SIZE_EN,Local_reg_size); /* set the region size and enable it*/ in Xil_SetAttribute()
273 Temp = mfcp(XREG_CP15_MPU_REG_SIZE_EN); in Xil_DisableMPURegions()
275 mfcp(XREG_CP15_MPU_REG_SIZE_EN,Temp); in Xil_DisableMPURegions()
279 mtcp(XREG_CP15_MPU_REG_SIZE_EN,Temp); in Xil_DisableMPURegions()
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| A D | xil_mpu.c | 189 mtcp(XREG_CP15_MPU_REG_SIZE_EN, Regionsize); /* set the region size and enable it*/ in Xil_SetMPURegion()
444 Temp = mfcp(XREG_CP15_MPU_REG_SIZE_EN); in Xil_DisableMPURegionByRegNum()
446 mfcp(XREG_CP15_MPU_REG_SIZE_EN,Temp); in Xil_DisableMPURegionByRegNum()
450 mtcp(XREG_CP15_MPU_REG_SIZE_EN,Temp); in Xil_DisableMPURegionByRegNum()
512 mtcp(XREG_CP15_MPU_REG_SIZE_EN, Regionsize); in Xil_SetMPURegionByRegNum()
543 MPURegSize = mfcp(XREG_CP15_MPU_REG_SIZE_EN); in Xil_InitializeExistingMPURegConfig()
547 mfcp(XREG_CP15_MPU_REG_SIZE_EN,MPURegSize); in Xil_InitializeExistingMPURegConfig()
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| A D | xreg_cortexr5.h | 255 #define XREG_CP15_MPU_REG_SIZE_EN "p15, 0, %0, c6, c1, 2" macro
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