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/libcpu/arm/zynqmp-r5/
A Dcache.c140 const u32 cacheline = 32U; in Xil_DCacheInvalidateRange() local
156 if ((tempadr & (cacheline - 1U)) != 0U) in Xil_DCacheInvalidateRange()
158 tempadr &= (~(cacheline - 1U)); in Xil_DCacheInvalidateRange()
162 if ((tempend & (cacheline - 1U)) != 0U) in Xil_DCacheInvalidateRange()
164 tempend &= (~(cacheline - 1U)); in Xil_DCacheInvalidateRange()
175 tempadr += cacheline; in Xil_DCacheInvalidateRange()
261 const u32 cacheline = 32U; in Xil_DCacheFlushRange() local
274 LocalAddr &= ~(cacheline - 1U); in Xil_DCacheFlushRange()
281 LocalAddr += cacheline; in Xil_DCacheFlushRange()
383 const u32 cacheline = 32U; in Xil_ICacheInvalidateRange() local
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