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Searched refs:irq (Results 1 – 25 of 34) sorted by relevance

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/libcpu/aarch64/common/
A Dgic.c82 irq = irq - _gic_table[index].offset; in arm_gic_ack()
95 irq = irq - _gic_table[index].offset; in arm_gic_mask()
107 irq = irq - _gic_table[index].offset; in arm_gic_umask()
119 irq = irq - _gic_table[index].offset; in arm_gic_get_pending_irq()
148 irq = irq - _gic_table[index].offset; in arm_gic_set_pending_irq()
169 irq = irq - _gic_table[index].offset; in arm_gic_clear_pending_irq()
191 irq = irq - _gic_table[index].offset; in arm_gic_set_configuration()
207 irq = irq - _gic_table[index].offset; in arm_gic_get_configuration()
219 irq = irq - _gic_table[index].offset; in arm_gic_clear_active()
232 irq = irq - _gic_table[index].offset; in arm_gic_set_cpu()
[all …]
A Dgicv3.c75 irq = irq - _gic_table[index].offset; in arm_gic_mask()
96 irq = irq - _gic_table[index].offset; in arm_gic_umask()
117 irq = irq - _gic_table[index].offset; in arm_gic_get_pending_irq()
146 irq = irq - _gic_table[index].offset; in arm_gic_set_pending_irq()
167 irq = irq - _gic_table[index].offset; in arm_gic_clear_pending_irq()
189 irq = irq - _gic_table[index].offset; in arm_gic_set_configuration()
205 irq = irq - _gic_table[index].offset; in arm_gic_get_configuration()
217 irq = irq - _gic_table[index].offset; in arm_gic_clear_active()
227 irq = irq - _gic_table[index].offset; in arm_gic_set_router_cpu()
237 irq = irq - _gic_table[index].offset; in arm_gic_get_router_cpu()
[all …]
/libcpu/arm/cortex-a/
A Dgic.c80 irq = irq - _gic_table[index].offset; in arm_gic_ack()
93 irq = irq - _gic_table[index].offset; in arm_gic_mask()
105 irq = irq - _gic_table[index].offset; in arm_gic_umask()
117 irq = irq - _gic_table[index].offset; in arm_gic_get_pending_irq()
146 irq = irq - _gic_table[index].offset; in arm_gic_set_pending_irq()
167 irq = irq - _gic_table[index].offset; in arm_gic_clear_pending_irq()
189 irq = irq - _gic_table[index].offset; in arm_gic_set_configuration()
205 irq = irq - _gic_table[index].offset; in arm_gic_get_configuration()
217 irq = irq - _gic_table[index].offset; in arm_gic_clear_active()
230 irq = irq - _gic_table[index].offset; in arm_gic_set_cpu()
[all …]
A Dgicv3.c83 irq = irq - _gic_table[index].offset; in arm_gic_mask()
104 irq = irq - _gic_table[index].offset; in arm_gic_umask()
125 irq = irq - _gic_table[index].offset; in arm_gic_get_pending_irq()
154 irq = irq - _gic_table[index].offset; in arm_gic_set_pending_irq()
175 irq = irq - _gic_table[index].offset; in arm_gic_clear_pending_irq()
197 irq = irq - _gic_table[index].offset; in arm_gic_set_configuration()
213 irq = irq - _gic_table[index].offset; in arm_gic_get_configuration()
225 irq = irq - _gic_table[index].offset; in arm_gic_clear_active()
238 irq = irq - _gic_table[index].offset; in arm_gic_set_cpu()
253 irq = irq - _gic_table[index].offset; in arm_gic_get_target_cpu()
[all …]
A Dgic.h18 void arm_gic_ack(rt_uint32_t index, int irq);
20 void arm_gic_mask(rt_uint32_t index, int irq);
21 void arm_gic_umask(rt_uint32_t index, int irq);
23 rt_uint32_t arm_gic_get_pending_irq(rt_uint32_t index, int irq);
24 void arm_gic_set_pending_irq(rt_uint32_t index, int irq);
25 void arm_gic_clear_pending_irq(rt_uint32_t index, int irq);
30 void arm_gic_clear_active(rt_uint32_t index, int irq);
33 rt_uint32_t arm_gic_get_target_cpu(rt_uint32_t index, int irq);
36 rt_uint32_t arm_gic_get_priority(rt_uint32_t index, int irq);
44 rt_uint32_t arm_gic_get_irq_status(rt_uint32_t index, int irq);
[all …]
A Dgicv3.h145 void arm_gic_ack(rt_uint32_t index, int irq);
147 void arm_gic_mask(rt_uint32_t index, int irq);
148 void arm_gic_umask(rt_uint32_t index, int irq);
150 rt_uint32_t arm_gic_get_pending_irq(rt_uint32_t index, int irq);
151 void arm_gic_set_pending_irq(rt_uint32_t index, int irq);
152 void arm_gic_clear_pending_irq(rt_uint32_t index, int irq);
157 void arm_gic_clear_active(rt_uint32_t index, int irq);
160 rt_uint32_t arm_gic_get_target_cpu(rt_uint32_t index, int irq);
163 rt_uint32_t arm_gic_get_priority(rt_uint32_t index, int irq);
171 rt_uint32_t arm_gic_get_irq_status(rt_uint32_t index, int irq);
[all …]
/libcpu/arm/cortex-r52/
A Dgicv3.c82 irq = irq - _gic_table[index].offset; in arm_gic_mask()
103 irq = irq - _gic_table[index].offset; in arm_gic_umask()
124 irq = irq - _gic_table[index].offset; in arm_gic_get_pending_irq()
153 irq = irq - _gic_table[index].offset; in arm_gic_set_pending_irq()
174 irq = irq - _gic_table[index].offset; in arm_gic_clear_pending_irq()
196 irq = irq - _gic_table[index].offset; in arm_gic_set_configuration()
212 irq = irq - _gic_table[index].offset; in arm_gic_get_configuration()
224 irq = irq - _gic_table[index].offset; in arm_gic_clear_active()
237 irq = irq - _gic_table[index].offset; in arm_gic_set_cpu()
252 irq = irq - _gic_table[index].offset; in arm_gic_get_target_cpu()
[all …]
A Dgicv3.h145 void arm_gic_ack(rt_uint32_t index, int irq);
147 void arm_gic_mask(rt_uint32_t index, int irq);
148 void arm_gic_umask(rt_uint32_t index, int irq);
150 rt_uint32_t arm_gic_get_pending_irq(rt_uint32_t index, int irq);
151 void arm_gic_set_pending_irq(rt_uint32_t index, int irq);
152 void arm_gic_clear_pending_irq(rt_uint32_t index, int irq);
157 void arm_gic_clear_active(rt_uint32_t index, int irq);
160 rt_uint32_t arm_gic_get_target_cpu(rt_uint32_t index, int irq);
163 rt_uint32_t arm_gic_get_priority(rt_uint32_t index, int irq);
171 rt_uint32_t arm_gic_get_irq_status(rt_uint32_t index, int irq);
[all …]
/libcpu/arm/realview-a8-vmm/
A Dgic.c55 int irq; in arm_gic_get_active_irq() local
61 return irq; in arm_gic_get_active_irq()
70 irq = irq - _gic_table[index].offset; in arm_gic_ack()
71 RT_ASSERT(irq >= 0); in arm_gic_ack()
84 irq = irq - _gic_table[index].offset; in arm_gic_mask()
85 RT_ASSERT(irq >= 0); in arm_gic_mask()
96 irq = irq - _gic_table[index].offset; in arm_gic_clear_pending()
97 RT_ASSERT(irq >= 0); in arm_gic_clear_pending()
108 irq = irq - _gic_table[index].offset; in arm_gic_clear_active()
120 irq = irq - _gic_table[index].offset; in arm_gic_set_cpu()
[all …]
A Dgic.h17 void arm_gic_mask(rt_uint32_t index, int irq);
18 void arm_gic_umask(rt_uint32_t index, int irq);
19 void arm_gic_set_cpu(rt_uint32_t index, int irq, unsigned int cpumask);
23 void arm_gic_ack(rt_uint32_t index, int irq);
25 void arm_gic_trigger(rt_uint32_t index, int target_cpu, int irq);
26 void arm_gic_clear_sgi(rt_uint32_t index, int target_cpu, int irq);
/libcpu/arm/zynqmp-r5/
A Dgic.c54 int irq; in arm_gic_get_active_irq() local
60 return irq; in arm_gic_get_active_irq()
69 irq = irq - _gic_table[index].offset; in arm_gic_ack()
70 RT_ASSERT(irq >= 0); in arm_gic_ack()
83 irq = irq - _gic_table[index].offset; in arm_gic_mask()
84 RT_ASSERT(irq >= 0); in arm_gic_mask()
95 irq = irq - _gic_table[index].offset; in arm_gic_set_cpu()
96 RT_ASSERT(irq >= 0); in arm_gic_set_cpu()
112 irq = irq - _gic_table[index].offset; in arm_gic_umask()
113 RT_ASSERT(irq >= 0); in arm_gic_umask()
[all …]
A Dgic.h17 void arm_gic_mask(rt_uint32_t index, int irq);
18 void arm_gic_umask(rt_uint32_t index, int irq);
19 void arm_gic_set_cpu(rt_uint32_t index, int irq, unsigned int cpumask);
22 void arm_gic_ack(rt_uint32_t index, int irq);
24 void arm_gic_trigger(rt_uint32_t index, int target_cpu, int irq);
25 void arm_gic_clear_sgi(rt_uint32_t index, int target_cpu, int irq);
/libcpu/aarch64/common/include/
A Dgic.h18 void arm_gic_ack(rt_uint64_t index, int irq);
20 void arm_gic_mask(rt_uint64_t index, int irq);
21 void arm_gic_umask(rt_uint64_t index, int irq);
23 rt_uint64_t arm_gic_get_pending_irq(rt_uint64_t index, int irq);
24 void arm_gic_set_pending_irq(rt_uint64_t index, int irq);
25 void arm_gic_clear_pending_irq(rt_uint64_t index, int irq);
30 void arm_gic_clear_active(rt_uint64_t index, int irq);
33 rt_uint64_t arm_gic_get_target_cpu(rt_uint64_t index, int irq);
36 rt_uint64_t arm_gic_get_priority(rt_uint64_t index, int irq);
44 rt_uint64_t arm_gic_get_irq_status(rt_uint64_t index, int irq);
[all …]
A Dgicv3.h144 void arm_gic_ack(rt_uint64_t index, int irq);
146 void arm_gic_mask(rt_uint64_t index, int irq);
147 void arm_gic_umask(rt_uint64_t index, int irq);
149 rt_uint64_t arm_gic_get_pending_irq(rt_uint64_t index, int irq);
150 void arm_gic_set_pending_irq(rt_uint64_t index, int irq);
151 void arm_gic_clear_pending_irq(rt_uint64_t index, int irq);
156 void arm_gic_clear_active(rt_uint64_t index, int irq);
160 rt_uint64_t arm_gic_get_target_cpu(rt_uint64_t index, int irq);
163 rt_uint64_t arm_gic_get_priority(rt_uint64_t index, int irq);
171 rt_uint64_t arm_gic_get_irq_status(rt_uint64_t index, int irq);
[all …]
/libcpu/unicore32/sep6200/
A Dinterrupt.c97 void rt_hw_interrupt_mask(int irq);
102 SEP6200_INT_ENABLE(irq); in sep6200_irq_enable()
107 SEP6200_INT_DISABLE(irq); in sep6200_irq_disable()
112 SEP6200_INT_ENABLE(irq); in sep6200_irq_unmask()
117 SEP6200_INT_DISABLE(irq); in sep6200_irq_mask()
158 void rt_hw_interrupt_mask(int irq) in rt_hw_interrupt_mask() argument
160 if (irq >= MAX_HANDLERS) { in rt_hw_interrupt_mask()
163 sep6200_irq_mask(irq); in rt_hw_interrupt_mask()
172 void rt_hw_interrupt_umask(int irq) in rt_hw_interrupt_umask() argument
174 if (irq >= MAX_HANDLERS) { in rt_hw_interrupt_umask()
[all …]
A Dtrap.c136 rt_uint32_t irq = 0; in rt_hw_trap_irq() local
141 irq = *(RP)(SEP6200_VIC_IRQ_VECTOR_NUM); in rt_hw_trap_irq()
144 isr_func = isr_table[irq].handler; in rt_hw_trap_irq()
145 param = isr_table[irq].param; in rt_hw_trap_irq()
148 isr_func(irq, param); in rt_hw_trap_irq()
151 isr_table[irq].counter++; in rt_hw_trap_irq()
/libcpu/risc-v/virt64/
A Dplic.c42 void plic_set_priority(int irq, int priority) in plic_set_priority() argument
44 *(uint32_t *)PLIC_PRIORITY(irq) = priority; in plic_set_priority()
51 void plic_irq_enable(int irq) in plic_irq_enable() argument
54 *(uint32_t *)PLIC_ENABLE(hart) = ((*(uint32_t *)PLIC_ENABLE(hart)) | (1 << irq)); in plic_irq_enable()
62 void plic_irq_disable(int irq) in plic_irq_disable() argument
65 *(uint32_t *)PLIC_ENABLE(hart) = (((*(uint32_t *)PLIC_ENABLE(hart)) & (~(1 << irq)))); in plic_irq_disable()
96 int irq = *(uint32_t *)PLIC_CLAIM(hart); in plic_claim() local
97 return irq; in plic_claim()
110 void plic_complete(int irq) in plic_complete() argument
113 *(uint32_t *)PLIC_COMPLETE(hart) = irq; in plic_complete()
A Dplic.h68 void plic_set_priority(int irq, int priority);
69 void plic_irq_enable(int irq);
70 void plic_irq_disable(int irq);
73 void plic_complete(int irq);
/libcpu/risc-v/t-head/c906/
A Dplic.c60 static void generic_handle_irq(int irq) in generic_handle_irq() argument
65 if (irq < 0 || irq >= IRQ_MAX_NR) in generic_handle_irq()
67 LOG_E("bad irq number %d!\n", irq); in generic_handle_irq()
71 if (!irq) // irq = 0 => no irq in generic_handle_irq()
76 isr = isr_table[IRQ_OFFSET + irq].handler; in generic_handle_irq()
80 isr(irq, param); in generic_handle_irq()
83 plic_complete(irq); in generic_handle_irq()
113 unsigned int irq; in plic_handle_irq() local
126 while ((irq = readl(claim))) in plic_handle_irq()
129 if (irq == 0) in plic_handle_irq()
[all …]
/libcpu/risc-v/t-head/c908/
A Dplic.c60 static void generic_handle_irq(int irq) in generic_handle_irq() argument
65 if (irq < 0 || irq >= IRQ_MAX_NR) in generic_handle_irq()
67 LOG_E("bad irq number %d!\n", irq); in generic_handle_irq()
71 if (!irq) // irq = 0 => no irq in generic_handle_irq()
76 isr = isr_table[IRQ_OFFSET + irq].handler; in generic_handle_irq()
80 isr(irq, param); in generic_handle_irq()
83 plic_complete(irq); in generic_handle_irq()
113 unsigned int irq; in plic_handle_irq() local
126 while ((irq = readl(claim))) in plic_handle_irq()
129 if (irq == 0) in plic_handle_irq()
[all …]
/libcpu/arm/s3c24x0/
A Dtrap.c144 unsigned long irq; in rt_hw_trap_irq() local
148 irq = INTOFFSET; in rt_hw_trap_irq()
150 if (irq == INTGLOBAL) return; in rt_hw_trap_irq()
153 isr_func = isr_table[irq].handler; in rt_hw_trap_irq()
154 param = isr_table[irq].param; in rt_hw_trap_irq()
157 isr_func(irq, param); in rt_hw_trap_irq()
161 ClearPending(1 << irq); in rt_hw_trap_irq()
164 isr_table[irq].counter++; in rt_hw_trap_irq()
/libcpu/arm/sep4020/
A Dtrap.c136 rt_uint32_t irq = 0; in rt_hw_trap_irq() local
147 irq++; in rt_hw_trap_irq()
151 isr_func = isr_table[irq].handler; in rt_hw_trap_irq()
152 param = isr_table[irq].param; in rt_hw_trap_irq()
155 isr_func(irq, param); in rt_hw_trap_irq()
158 isr_table[irq].counter++; in rt_hw_trap_irq()
/libcpu/arm/cortex-r4/
A Dtrap.c133 struct rt_irq_desc* irq; in rt_hw_trap_irq() local
136 irq = (struct rt_irq_desc*) vimREG->IRQVECREG; in rt_hw_trap_irq()
137 irqno = ((rt_uint32_t) irq - (rt_uint32_t) &irq_desc[0])/sizeof(struct rt_irq_desc); in rt_hw_trap_irq()
140 irq->handler(irqno, irq->param); in rt_hw_trap_irq()
/libcpu/arm/lpc24xx/
A Dtrap.c128 struct rt_irq_desc* irq; in rt_hw_trap_irq() local
131 irq = (struct rt_irq_desc*) VICVectAddr; in rt_hw_trap_irq()
132 irqno = ((rt_uint32_t) irq - (rt_uint32_t) &irq_desc[0])/sizeof(struct rt_irq_desc); in rt_hw_trap_irq()
135 irq->handler(irqno, irq->param); in rt_hw_trap_irq()
/libcpu/arm/lpc214x/
A Dcpuport.c165 struct rt_irq_desc* irq; in rt_hw_trap_irq() local
168 irq = (struct rt_irq_desc*) VICVectAddr; in rt_hw_trap_irq()
169 irqno = ((rt_uint32_t) irq - (rt_uint32_t) &irq_desc[0])/sizeof(struct rt_irq_desc); in rt_hw_trap_irq()
172 irq->handler(irqno, irq->param); in rt_hw_trap_irq()

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